-
公开(公告)号：US20240321613A1
公开(公告)日：2024-09-26
申请号：US18679252
申请日：2024-05-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Peng-Ren Chen , Wen-Hao Cheng , Jyun-Hong Chen , Chien-Hui Chen
CPC classification number: H01L21/67288 , H01L22/14
Abstract: Systematic fault localization systems and methods are provided which utilize computational GDS-assisted navigation to accelerate physical fault analysis to identify systematic fault locations and patterns. In some embodiments, a method includes detecting a plurality of electrical fault regions of a plurality of dies of a semiconductor wafer. Decomposed Graphic Database System (GDS) cross-layer clips are generated which are associated with the plurality of electrical fault regions. A plurality of cross-layer common patterns is identified based on the decomposed GDS cross-layer clips. Normalized differentials may be determined for each of the cross-layer common patterns, and locations of hotspots in each of the dies may be identified based on the determined normalized differentials.
-
公开(公告)号：US11600505B2
公开(公告)日：2023-03-07
申请号：US16527435
申请日：2019-07-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Peng-Ren Chen , Wen-Hao Cheng , Jyun-Hong Chen , Chien-Hui Chen
Abstract: Systematic fault localization systems and methods are provided which utilize computational GDS-assisted navigation to accelerate physical fault analysis to identify systematic fault locations and patterns. In some embodiments, a method includes detecting a plurality of electrical fault regions of a plurality of dies of a semiconductor wafer. Decomposed Graphic Database System (GDS) cross-layer clips are generated which are associated with the plurality of electrical fault regions. A plurality of cross-layer common patterns is identified based on the decomposed GDS cross-layer clips. Normalized differentials may be determined for each of the cross-layer common patterns, and locations of hotspots in each of the dies may be identified based on the determined normalized differentials.
-
公开(公告)号：US11182532B2
公开(公告)日：2021-11-23
申请号：US16806196
申请日：2020-03-02
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Venkata Sripathi Sasanka Pratapa , Jyun-Hong Chen , Wen-Hao Cheng
IPC: G06F30/30 , H01L23/00 , G06F30/398 , G06F30/392 , G06F111/10 , G06F113/18
Abstract: The current disclosure describes techniques for managing planarization of features formed on a semiconductor wafer. The disclosed techniques achieve relative planarization of micro bump structures formed on a wafer surface by adjusting the pattern density of the micro bumps formed within various regions on the wafer surface. The surface area size of a micro bump formed within a given wafer surface region may be enlarged or reduced to change the pattern density. A dummy micro bump may be inserted into a given wafer surface region to increase the pattern density.
-
公开(公告)号：US12027396B2
公开(公告)日：2024-07-02
申请号：US18163821
申请日：2023-02-02
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Peng-Ren Chen , Wen-Hao Cheng , Jyun-Hong Chen , Chien-Hui Chen
CPC classification number: H01L21/67288 , H01L22/14
Abstract: Systematic fault localization systems and methods are provided which utilize computational GDS-assisted navigation to accelerate physical fault analysis to identify systematic fault locations and patterns. In some embodiments, a method includes detecting a plurality of electrical fault regions of a plurality of dies of a semiconductor wafer. Decomposed Graphic Database System (GDS) cross-layer clips are generated which are associated with the plurality of electrical fault regions. A plurality of cross-layer common patterns is identified based on the decomposed GDS cross-layer clips. Normalized differentials may be determined for each of the cross-layer common patterns, and locations of hotspots in each of the dies may be identified based on the determined normalized differentials.
-
公开(公告)号：US20220075924A1
公开(公告)日：2022-03-10
申请号：US17531507
申请日：2021-11-19
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Venkata Sripathi Sasanka Pratapa , Jyun-Hong Chen , Wen-Hao Cheng
IPC: G06F30/398 , G06F30/392 , H01L23/00
Abstract: The current disclosure describes techniques for managing planarization of features formed on a semiconductor wafer. The disclosed techniques achieve relative planarization of micro bump structures formed on a wafer surface by adjusting the pattern density of the micro bumps formed within various regions on the wafer surface. The surface area size of a micro bump formed within a given wafer surface region may be enlarged or reduced to change the pattern density. A dummy micro bump may be inserted into a given wafer surface region to increase the pattern density.
-
Patent Agency Ranking
公开(公告)号：US20210019465A1
公开(公告)日：2021-01-21
申请号：US16806196
申请日：2020-03-02
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Venkata Sripathi Sasanka Pratapa , Jyun-Hong Chen , Wen-Hao Cheng
IPC: G06F30/392 , H01L23/488 , H01L23/532 , H01L25/065 , H01L23/00
Abstract: The current disclosure describes techniques for managing planarization of features formed on a semiconductor wafer. The disclosed techniques achieve relative planarization of micro bump structures formed on a wafer surface by adjusting the pattern density of the micro bumps formed within various regions on the wafer surface. The surface area size of a micro bump formed within a given wafer surface region may be enlarged or reduced to change the pattern density. A dummy micro bump may be inserted into a given wafer surface region to increase the pattern density.
-
公开(公告)号：US11681851B2
公开(公告)日：2023-06-20
申请号：US17531507
申请日：2021-11-19
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Venkata Sripathi Sasanka Pratapa , Jyun-Hong Chen , Wen-Hao Cheng
IPC: G06F30/30 , H01L23/00 , G06F30/398 , G06F30/392 , G06F111/10 , G06F113/18
CPC classification number: G06F30/398 , G06F30/392 , H01L24/14 , G06F2111/10 , G06F2113/18
Abstract: The current disclosure describes techniques for managing planarization of features formed on a semiconductor wafer. The disclosed techniques achieve relative planarization of micro bump structures formed on a wafer surface by adjusting the pattern density of the micro bumps formed within various regions on the wafer surface. The surface area size of a micro bump formed within a given wafer surface region may be enlarged or reduced to change the pattern density. A dummy micro bump may be inserted into a given wafer surface region to increase the pattern density.
-
公开(公告)号：US20230178399A1
公开(公告)日：2023-06-08
申请号：US18163821
申请日：2023-02-02
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Peng-Ren Chen , Wen-Hao Cheng , Jyun-Hong Chen , Chien-Hui Chen
CPC classification number: H01L21/67288 , H01L22/14
Abstract: Systematic fault localization systems and methods are provided which utilize computational GDS-assisted navigation to accelerate physical fault analysis to identify systematic fault locations and patterns. In some embodiments, a method includes detecting a plurality of electrical fault regions of a plurality of dies of a semiconductor wafer. Decomposed Graphic Database System (GDS) cross-layer clips are generated which are associated with the plurality of electrical fault regions. A plurality of cross-layer common patterns is identified based on the decomposed GDS cross-layer clips. Normalized differentials may be determined for each of the cross-layer common patterns, and locations of hotspots in each of the dies may be identified based on the determined normalized differentials.
-
公开(公告)号：US11094057B2
公开(公告)日：2021-08-17
申请号：US16984090
申请日：2020-08-03
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
Inventor： Peng-Ren Chen , Shiang-Bau Wang , Wen-Hao Cheng , Yung-Jung Chang , Wei-Chung Hu , Yi-An Huang , Jyun-Hong Chen
Abstract: A method includes capturing a raw image from a semiconductor wafer, using graphic data system (GDS) information corresponding to the wafer to assign a measurement box in the raw image, performing a distance measurement on a feature of the raw image in the measurement box, and performing a manufacturing activity based on the distance measurement.
-
公开(公告)号：US10762621B2
公开(公告)日：2020-09-01
申请号：US16400833
申请日：2019-05-01
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
Inventor： Peng-Ren Chen , Shiang-Bau Wang , Wen-Hao Cheng , Yung-Jung Chang , Wei-Chung Hu , Yi-An Huang , Jyun-Hong Chen
Abstract: A method includes capturing a raw image from a semiconductor wafer, assigning a measurement box in the raw image, arranging a pair of indicators in the measurement box according to graphic data system (GDS) information of the semiconductor wafer, measuring a distance between the indicators, and performing a manufacturing activity based on the measured distance.
-
-
-
-
-
-
-
-
-
Search Results
11
records
(took 0.015 seconds)
