公开(公告)号：US11800823B2

公开(公告)日：2023-10-24

申请号：US17165088

申请日：2021-02-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Fa-Shen Jiang ,  Hsing-Lien Lin

IPC: H10N70/20 ,  G11C13/00 ,  H10N70/00

CPC classification number: H10N70/245 ,  G11C13/0011 ,  H10N70/063 ,  H10N70/8265 ,  H10N70/841 ,  H10N70/8613

Abstract: Some embodiments relate to a method for manufacturing a memory device. The method includes forming a bottom electrode over a substrate. A heat dispersion layer is formed over the bottom electrode. A dielectric layer is formed over the heat dispersion layer. A top electrode is formed over the dielectric layer. The heat dispersion layer comprises a first dielectric material.

公开(公告)号：US11527717B2

公开(公告)日：2022-12-13

申请号：US16807564

申请日：2020-03-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hai-Dang Trinh ,  Chii-Ming Wu ,  Hsing-Lien Lin ,  Tzu-Chung Tsai ,  Fa-Shen Jiang ,  Bi-Shen Lee

IPC: H01L45/00 ,  H01L27/24

Abstract: Various embodiments of the present disclosure are directed towards a memory cell including a co-doped data storage structure. A bottom electrode overlies a substrate and a top electrode overlies the bottom electrode. The data storage structure is disposed between the top and bottom electrodes. The data storage structure comprises a dielectric material doped with a first dopant and a second dopant.

公开(公告)号：US20210111343A1

公开(公告)日：2021-04-15

申请号：US16601771

申请日：2019-10-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Fa-Shen Jiang ,  Cheng-Yuan Tsai ,  Hai-Dang Trinh ,  Hsing-Lien Lin ,  Bi-Shen Lee

IPC: H01L45/00 ,  H01L27/24

Abstract: The present disclosure relates to a method of forming a resistive random access memory (RRAM) device. In some embodiments, the method may be performed by forming a first electrode structure over a substrate. A doped data storage element is formed over the first electrode structure. The doped data storage element is formed by forming a first data storage layer over the first electrode structure and forming a second data storage layer over the first data storage layer. The first data storage layer is formed to have a first doping concentration of a dopant and the second data storage layer is formed to have a second doping concentration of the dopant that is less than the first doping concentration. A second electrode structure is formed over the doped data storage element.

公开(公告)号：US10818857B2

公开(公告)日：2020-10-27

申请号：US15846547

申请日：2017-12-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chin-Wei Liang ,  Hsing-Lien Lin ,  Cheng-Yuan Tsai ,  Chia-Shiung Tsai

IPC: H01L51/42 ,  H01L27/146 ,  H01L31/0256 ,  H01L51/00

Abstract: The present disclosure provides a photosensitive device. The photosensitive device includes a donor-intermix-acceptor (PIN) structure. The PIN structure includes an organic hole transport layer; an organic electron transport layer; and an intermix layer sandwiched between the hole transport organic material layer and the electron transport organic material layer. The intermix layer includes a mixture of an n-type organic material and a p-type organic material.

公开(公告)号：US10811600B2

公开(公告)日：2020-10-20

申请号：US16655478

申请日：2019-10-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hai-Dang Trinh ,  Cheng-Yuan Tsai ,  Hsing-Lien Lin ,  Wen-Ting Chu

IPC: H01L45/00 ,  G06F12/02 ,  H01L27/24

Abstract: The present disclosure, in some embodiments, relates to a resistive random access memory (RRAM) device. The RRAM device includes a first electrode over a substrate and a second electrode over the substrate. A data storage structure is disposed between the first electrode and the second electrode. The data storage structure has a plurality of sub-layers including one or more metals having non-zero concentrations that change as a distance from the first electrode increases.

公开(公告)号：US20200274058A1

公开(公告)日：2020-08-27

申请号：US15931896

申请日：2020-05-14

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Hai-Dang Trinh ,  Hsing-Lien Lin ,  Chii-Ming Wu ,  Cheng-Yuan Tsai

IPC: H01L45/00 ,  G11C13/00 ,  G11C11/56

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a lower electrode over the semiconductor substrate. The semiconductor device structure also includes a first dielectric layer over the lower electrode, a second dielectric layer over the first dielectric layer, and a third dielectric layer over the second dielectric layer. Oxygen ions are bonded more tightly in the second dielectric layer than those in the first dielectric layer, and oxygen ions are bonded more tightly in the second dielectric layer than those in the third dielectric layer.

公开(公告)号：US10079257B2

公开(公告)日：2018-09-18

申请号：US13755376

申请日：2013-01-31

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Hsing-Lien Lin ,  Yeur-Luen Tu ,  Cheng-Yuan Tsai ,  Cheng-Ta Wu ,  Chia-Shiung Tsai

IPC: H01L31/0216 ,  H01L27/146

CPC classification number: H01L27/14625 ,  H01L27/14609 ,  H01L27/1462 ,  H01L27/14627 ,  H01L27/1464 ,  H01L27/14685 ,  H01L31/02168

Abstract: A method of forming an image sensor device includes forming a light sensing region at a front surface of a silicon substrate and a patterned metal layer there over. Thereafter, the method includes depositing a metal oxide anti-reflection laminate on the first surface of the substrate. The metal oxide anti-reflection laminate includes one or more composite layers of thin metal oxides stacked over the photodiode. Each composite layer includes two or more metal oxide layers: one metal oxide is a high energy band gap metal oxide and another metal oxide is a high refractive index metal oxide.

公开(公告)号：US09728597B2

公开(公告)日：2017-08-08

申请号：US14800144

申请日：2015-07-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd

Inventor： Hsing-Lien Lin ,  Chia-Shiung Tsai ,  Cheng-Yuan Tsai ,  Huey-Chi Chu ,  Hai-Dang Trinh ,  Wen-Chuan Chiang ,  Wei-Min Tseng

IPC: H01L49/02 ,  H01L21/02 ,  H01L23/522

CPC classification number: H01L28/60 ,  H01L21/0226 ,  H01L21/0228 ,  H01L23/5223

Abstract: A semiconductor structure and a method for forming the same are provided. The method for manufacturing a semiconductor structure includes forming a bottom electrode layer over a substrate and forming a first passivation layer over the bottom electrode layer by a first atomic layer deposition process. The method for manufacturing a semiconductor structure further includes forming a dielectric layer over the first passivation layer by a second atomic layer deposition process and forming a second passivation layer over the dielectric layer by a third atomic layer deposition process. The method for manufacturing a semiconductor structure further includes forming a top electrode layer over the second passivation layer.

公开(公告)号：US09543375B2

公开(公告)日：2017-01-10

申请号：US14316910

申请日：2014-06-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jian-Shiou Huang ,  Yao-Wen Chang ,  Hsing-Lien Lin ,  Cheng-Yuan Tsai ,  Chia-Shiung Tsai

IPC: H01L49/02 ,  H01L21/02

CPC classification number: H01L28/40 ,  H01L21/02112 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02266 ,  H01L23/5223 ,  H01L29/88 ,  H01L45/08 ,  H01L45/10

Abstract: Some embodiments of the present disclosure provide an integrated circuit (IC) device including a metal-insulator-metal (MIM) capacitor structure. The MIM capacitor structure includes a lower metal capacitor electrode, an upper metal capacitor electrode, and a capacitor dielectric separating the lower metal capacitor electrode from the upper metal capacitor electrode. The capacitor dielectric is made up of an amorphous oxide/nitride matrix and a plurality of metal or metal oxide/nitride nano-particles that are randomly distributed over the volume of amorphous oxide/nitride matrix.

Abstract translation: 本公开的一些实施例提供了包括金属 - 绝缘体 - 金属（MIM）电容器结构的集成电路（IC）装置。 MIM电容器结构包括下金属电容器电极，上金属电容器电极和将下金属电容器电极与上金属电容器电极分离的电容器电介质。 电容器电介质由无定形氧化物/氮化物基体和随机分布在无定形氧化物/氮化物基体的体积上的多个金属或金属氧化物/氮化物纳米颗粒构成。

公开(公告)号：US20160064664A1

公开(公告)日：2016-03-03

申请号：US14471101

申请日：2014-08-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Trinh Hai Dang ,  Hsing-Lien Lin ,  Chin-Wei Liang ,  Cheng-Yuan Tsai ,  Chia-Shiung Tsai

IPC: H01L45/00

CPC classification number: H01L45/146 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1675

Abstract: An integrated circuit or semiconductor structure of a resistive random access memory (RRAM) cell is provided. The RRAM cell includes a bottom electrode and a data storage region having a variable resistance arranged over the bottom electrode. Further, the RRAM cell includes a diffusion barrier layer arranged over the data storage region, an ion reservoir region arranged over the diffusion barrier layer, and a top electrode arranged over the ion reservoir region. A method for manufacture the integrated circuit or semiconductor structure of the RRAM cell is also provided.

Abstract translation: 提供了电阻随机存取存储器（RRAM）单元的集成电路或半导体结构。 RRAM单元包括底部电极和布置在底部电极上的具有可变电阻的数据存储区域。 此外，RRAM单元包括布置在数据存储区域上的扩散阻挡层，布置在扩散阻挡层上的离子储存区域和布置在离子储存区域上的顶部电极。 还提供了一种用于制造RRAM单元的集成电路或半导体结构的方法。