公开(公告)号：US20230387039A1

公开(公告)日：2023-11-30

申请号：US17881128

申请日：2022-08-04

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Sung-Yueh Wu ,  Jen-Chun Liao ,  Mao-Yen Chang ,  Yu-Chia Lai ,  Chien Ling Hwang ,  Ching-Hua Hsieh

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/367 ,  H01L23/552 ,  H01L21/56 ,  H01L21/48

CPC分类号： H01L23/562 ,  H01L23/3107 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/367 ,  H01L23/552 ,  H01L21/56 ,  H01L21/4857

摘要： A semiconductor package includes a first package component comprising: an integrated circuit die; an encapsulant surrounding the integrated circuit die; and a fan-out structure electrically connected to the integrated circuit die, wherein a first opening extends completely through the fan-out structure and at least partially through the encapsulant in a cross-sectional view, and wherein the encapsulant at least completely surrounds the first opening in a top-down view. The semiconductor package further includes a package substrate bonded to the first package component.

公开(公告)号：US20240234210A1

公开(公告)日：2024-07-11

申请号：US18151643

申请日：2023-01-09

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Jen-Chun Liao ,  Yen-Hung Chen ,  Ching-Hua Hsieh ,  Sung-Yueh Wu ,  Chih-Wei Lin ,  Kung-Chen Yeh

IPC分类号： H01L21/822 ,  H01L21/3065 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L25/065

CPC分类号： H01L21/822 ,  H01L21/3065 ,  H01L21/56 ,  H01L23/3121 ,  H01L24/08 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/80 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0652 ,  H01L2224/08059 ,  H01L2224/08145 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/95001 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2924/10156 ,  H01L2924/10157

摘要： An integrated circuit package including integrated circuit dies and a method of forming are provided. The integrated circuit package may include a first integrated circuit die and a second integrated circuit die bonded to the first integrated circuit die. The first integrated circuit die may include a first substrate, a first interconnect structure, and a first bonding layer. The first interconnect structure may be between the first bonding layer and the first substrate. The second integrated circuit die may include a second substrate, a second interconnect structure, and a second bonding layer. The second interconnect structure may be between the second bonding layer and the second substrate. A first surface of the first bonding layer may be in direct contact with a first surface of the second bonding layer. A sidewall the first bonding layer and the first surface of the second bonding layer may form a first acute angle.

公开(公告)号：US20240113071A1

公开(公告)日：2024-04-04

申请号：US18150240

申请日：2023-01-05

申请人： Taiwan Semiconductor Manufacturing Co., Ltd

发明人： Chung-Shi Liu ,  Mao-Yen Chang ,  Yu-Chia Lai ,  Kuo-Lung Pan ,  Hao-Yi Tsai ,  Ching-Hua Hsieh ,  Hsiu-Jen Lin ,  Po-Yuan Teng ,  Cheng-Chieh Wu ,  Jen-Chun Liao

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L23/40 ,  H01L25/18 ,  H10B80/00

CPC分类号： H01L24/95 ,  H01L21/563 ,  H01L23/3185 ,  H01L23/4012 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L25/18 ,  H10B80/00 ,  H01L2023/4081 ,  H01L2023/4087 ,  H01L2224/16227 ,  H01L2224/19 ,  H01L2224/211 ,  H01L2224/215 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83007 ,  H01L2224/83939 ,  H01L2224/95 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/3512

摘要： An integrated circuit package including electrically floating metal lines and a method of forming are provided. The integrated circuit package may include integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure on the encapsulant, a first electrically floating metal line disposed on the redistribution structure, a first electrical component connected to the redistribution structure, and an underfill between the first electrical component and the redistribution structure. A first opening in the underfill may expose a top surface of the first electrically floating metal line.