Touch screen
    2.
    发明授权

    公开(公告)号:US10949024B2

    公开(公告)日:2021-03-16

    申请号:US15981688

    申请日:2018-05-16

    IPC分类号: G06F3/042 G06F3/046

    摘要: A pulse of terahertz radiation is transmitted through a touch panel formed of a dielectric material. The pulse generates an employable evanescent field in a region adjacent to a touch surface of the touch panel. The terahertz radiation has a frequency range between 0.1 terahertz and 10 terahertz. A reflected pulse is generated from an object located within the region adjacent to the touch surface of the touch panel. A position is triangulated of the object on the touch surface of the touch panel, based at least in part on the reflected pulse.

    Sampling rate based adaptive analog biasing
    4.
    发明授权
    Sampling rate based adaptive analog biasing 有权
    基于采样率的自适应模拟偏置

    公开(公告)号:US09007244B2

    公开(公告)日:2015-04-14

    申请号:US14321434

    申请日:2014-07-01

    IPC分类号: H03M1/00 H03M1/12

    摘要: A mixed signal device includes an analog circuit and a digital circuit coupled to the analog circuit. The digital circuit includes a component that samples a signal at a sampling rate that is dynamically variable by the digital circuit based on the bandwidth of the incoming signal. The digital circuit is to automatically assert a signal to the analog circuit to change a bias current of the analog circuit based on a change to the sampling rate in the digital circuit.

    摘要翻译: 混合信号装置包括模拟电路和耦合到模拟电路的数字电路。 数字电路包括以基于输入信号的带宽由数字电路动态变化的采样率对信号进行采样的部件。 数字电路是根据数字电路中采样率的变化,自动向模拟电路断言信号以改变模拟电路的偏置电流。

    Differential hall sensor
    5.
    发明授权

    公开(公告)号:US11567107B2

    公开(公告)日:2023-01-31

    申请号:US17138977

    申请日:2020-12-31

    IPC分类号: G01R15/20

    摘要: A system comprises first and second Hall-effect sensors and an amplifier. The first Hall-effect sensor has a first bias current direction parallel to a first direction, a pair of first bias input terminals spaced along the first direction, and a pair of first sense output terminals spaced along an orthogonal second direction. The second Hall-effect sensor has a second bias current direction parallel to the second direction, a pair of second bias input terminals spaced along the second direction, and a pair of second sense output terminals connected out of phase with the first sense terminals. The amplifier has a pair of amplifier input terminals coupled to the first and second sense terminals.

    FREQUENCY MULTIPLIER
    8.
    发明申请
    FREQUENCY MULTIPLIER 有权
    频率乘法器

    公开(公告)号:US20140198550A1

    公开(公告)日:2014-07-17

    申请号:US13741010

    申请日:2013-01-14

    IPC分类号: H02M5/16 H02M5/297

    CPC分类号: H02M5/16 H02M5/297 H03B19/14

    摘要: An apparatus is provided. A differential pair of transistors is configured to receive a first differential signal having a first frequency, and a transformer, having a primary side and a secondary side is provided. The primary side of the transformer is coupled to the differential pair of transistors, and the secondary side of the transformer is configured to output a second differential signal having a second frequency, where the second frequency is greater than the first frequency. A first transistor is coupled to the first supply rail, the primary side of the transformer, and the differential pair of transistors, where the first transistor is of a first conduction type. A second transistor is coupled to the second supply rail, the primary side of the transformer, and the differential pair of transistors, where the second transistor is of a second conduction type.

    摘要翻译: 提供了一种装置。 差分对晶体管被配置为接收具有第一频率的第一差分信号,并且提供具有初级侧和次级侧的变压器。 变压器的初级侧耦合到差分对晶体管,并且变压器的次级侧被配置为输出具有第二频率的第二差分信号,其中第二频率大于第一频率。 第一晶体管耦合到第一电源轨,变压器的初级侧和差分对晶体管,其中第一晶体管是第一导电类型。 第二晶体管耦合到第二电源轨,变压器的初级侧和差分对晶体管,其中第二晶体管是第二导电类型。

    Frequency multiplier
    9.
    发明授权
    Frequency multiplier 有权
    倍频器

    公开(公告)号:US08760899B1

    公开(公告)日:2014-06-24

    申请号:US13741010

    申请日:2013-01-14

    IPC分类号: H02M5/275

    CPC分类号: H02M5/16 H02M5/297 H03B19/14

    摘要: An apparatus is provided. A differential pair of transistors is configured to receive a first differential signal having a first frequency, and a transformer, having a primary side and a secondary side is provided. The primary side of the transformer is coupled to the differential pair of transistors, and the secondary side of the transformer is configured to output a second differential signal having a second frequency, where the second frequency is greater than the first frequency. A first transistor is coupled to the first supply rail, the primary side of the transformer, and the differential pair of transistors, where the first transistor is of a first conduction type. A second transistor is coupled to the second supply rail, the primary side of the transformer, and the differential pair of transistors, where the second transistor is of a second conduction type.

    摘要翻译: 提供了一种装置。 差分对晶体管被配置为接收具有第一频率的第一差分信号,并且提供具有初级侧和次级侧的变压器。 变压器的初级侧耦合到差分对晶体管,并且变压器的次级侧被配置为输出具有第二频率的第二差分信号,其中第二频率大于第一频率。 第一晶体管耦合到第一电源轨,变压器的初级侧和差分对晶体管,其中第一晶体管是第一导电类型。 第二晶体管耦合到第二电源轨,变压器的初级侧和差分对晶体管,其中第二晶体管是第二导电类型。

    Dual comparator-based error correction scheme for analog-to-digital converters
    10.
    发明授权
    Dual comparator-based error correction scheme for analog-to-digital converters 有权
    用于模数转换器的基于双比较器的纠错方案

    公开(公告)号:US09148159B1

    公开(公告)日:2015-09-29

    申请号:US14209813

    申请日:2014-03-13

    摘要: An analog-to-digital converter (ADC) includes a first comparator, a second comparator, and a decision timing comparison logic unit. The first comparator is configured to output a first output voltage and the second comparator is configured to output a second output voltage during a same binary algorithmic iteration of the ADC. The decision timing comparison logic unit is configured to identify a first polarity of the first output voltage and a second polarity of the second output voltage and, if the first polarity is equivalent to a second polarity, to insert at least one redundant capacitor for a next binary algorithmic iteration of the ADC.

    摘要翻译: 模数转换器(ADC)包括第一比较器,第二比较器和判定定时比较逻辑单元。 第一比较器被配置为输出第一输出电压,并且第二比较器被配置为在ADC的相同的二进制算法迭代期间输出第二输出电压。 所述判定定时比较逻辑单元被配置为识别所述第一输出电压的第一极性和所述第二输出电压的第二极性,并且如果所述第一极性等于第二极性,则将至少一个冗余电容器插入下一个 ADC的二进制算法迭代。