公开(公告)号：US20180189133A1

公开(公告)日：2018-07-05

申请号：US15653749

申请日：2017-07-19

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Indu PRATHAPAN ,  Prashanth SARAF ,  Desmond Pravin Martin FERNANDES ,  Saket JALAN

IPC分类号： G06F11/10 ,  G11C5/04 ,  G06F3/06 ,  G11C11/16 ,  G11C11/56 ,  H03M13/35

CPC分类号： G06F11/1044 ,  G06F3/0653 ,  G06F11/1012 ,  G06F11/1068 ,  G06F11/1076 ,  G06F11/108 ,  G11C5/04 ,  G11C7/1006 ,  G11C7/22 ,  G11C11/1675 ,  G11C11/5628 ,  G11C2207/2263 ,  G11C2207/229 ,  H03M13/19 ,  H03M13/35 ,  H03M13/356 ,  H03M13/3776

摘要： In the described examples, a memory controller includes a read-modify-write logic module that receives a partial write data request for partial write data in error-correcting code (ECC) memory and combines the partial write data in the partial write data request with read data provided from the ECC memory to form combined data prior to correcting the read data. The memory controller also includes a write control module that controls the writing of the combined data to the ECC memory.