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1.发明公开公开(公告)号：US20230162976A1
公开(公告)日：2023-05-25
申请号：US18151972
申请日：2023-01-09
发明人： Po-Chun LIU , Chung-Chieh HSU , Chi-Ming CHEN , Chung-Yi YU , Chen-Hao CHIANG , Min-Chang CHING
IPC分类号： H01L21/02 , H01L29/66 , H01L29/778 , H01L29/45
CPC分类号： H01L21/0254 , H01L29/66462 , H01L21/02458 , H01L29/7786 , H01L21/0262 , H01L21/0251 , H01L29/454 , H01L29/2003
摘要： A high electron mobility transistor (HEMT) includes a substrate; and a first semiconductor layer over the substrate. The HEMT further includes a second semiconductor layer over the first semiconductor layer, wherein the second semiconductor layer has a band gap discontinuity with the first semiconductor layer, and at least one of the first semiconductor layer or the second semiconductor layer comprises indium. The HEMT further includes a top layer over the second semiconductor layer. The HEMT further includes a gate electrode over the top layer. The HEMT further includes a source and a drain on opposite sides of the gate electrode, wherein the top layer extends continuously from below the source, below the gate electrode, and to below the drain.
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公开(公告)号：US20190027360A1
公开(公告)日：2019-01-24
申请号：US16126906
申请日：2018-09-10
发明人： Chi-Ming CHEN , Po-Chun LIU , Chung-Yi YU , Chia-Shiung TSAI
IPC分类号： H01L21/02 , H01L29/66 , H01L29/205 , H01L29/20 , H01L29/15 , H01L29/778
摘要： A semiconductor structure including a substrate and a nucleation layer over the substrate. The semiconductor structure further includes a first III-V layer over the nucleation layer, wherein the first III-V layer includes a first dopant type. The semiconductor structure further includes one or more sets of III-V layers over the first III-V layer. Each set of the one or more sets of III-V layers includes a lower III-V layer, wherein the lower III-V layer has a second dopant type opposite the first dopant type, and an upper III-V layer on the lower III-V layer, wherein the upper III-V layer has the first dopant type. The semiconductor structure further includes a second III-V layer over the one or more sets of III-V layers, the second III-V layer having the second dopant type.
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公开(公告)号：US20160284827A1
公开(公告)日：2016-09-29
申请号：US15173907
申请日：2016-06-06
发明人： Chen-Hao CHIANG , Po-Chun LIU , Chi-Ming CHEN , Min-Chang CHING , Chung-Yi YU , Chia-Shiung TSAI , Ru-Liang LEE
IPC分类号： H01L29/778 , H01L29/205 , H01L29/66 , H01L21/225 , H01L21/324 , H01L29/20 , H01L29/45
CPC分类号： H01L29/7784 , H01L21/18 , H01L21/182 , H01L21/2258 , H01L21/3245 , H01L23/3171 , H01L29/2003 , H01L29/205 , H01L29/452 , H01L29/66431 , H01L29/66462 , H01L29/7786 , H01L29/7787 , H01L31/18 , H01L31/1848 , H01L33/002 , H01L33/0025 , H01L2924/0002 , H01L2924/10323 , H01L2924/10344 , H01L2924/00
摘要： A semiconductor device includes an indium gallium nitride layer over an active layer. The semiconductor device further includes an annealed region beneath the indium gallium nitride layer, the annealed region comprising indium atoms driven from the indium gallium nitride layer into the active layer.
摘要翻译： 半导体器件包括有源层上的氮化铟镓层。 半导体器件还包括氮化铟镓层下方的退火区域，退火区域包括从氮化铟镓层驱动到有源层中的铟原子。
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4.发明申请TRANSISTOR HAVING PARTIALLY OR WHOLLY REPLACED SUBSTRATE AND METHOD OF MAKING THE SAME 审中-公开具有部分或完全替换基板的晶体管及其制造方法公开(公告)号：US20150021666A1
公开(公告)日：2015-01-22
申请号：US13944779
申请日：2013-07-17
发明人： Chi-Ming CHEN , Chih-Wen HSIUNG , Yuan-Chih HSIEH , Po-Chun LIU , Ming Chyi LIU , Chung-Yi YU , Chia-Shiung TSAI , Xiaomeng CHEN
IPC分类号： H01L29/778 , H01L29/66
CPC分类号： H01L29/7786 , H01L29/2003 , H01L29/402 , H01L29/41766 , H01L29/66462
摘要： A transistor includes a substrate, a channel layer over the substrate, an active structure over the channel layer, a gate electrode over the channel layer, and a drain electrode over the channel layer. The active structure is configured to cause a two dimensional electron gas (2DEG) to be formed in the channel layer along an interface between the channel layer and the active structure. The gate electrode and the drain electrode define a first space therebetween. The substrate has a first portion directly under the first space defined between the gate electrode and the drain electrode, and the first portion has a first electrical conductivity value less than that of intrinsic silicon and a thermal conductivity value greater than that of intrinsic silicon.
摘要翻译： 晶体管包括衬底，衬底上的沟道层，沟道层上的有源结构，沟道层上的栅电极以及沟道层上的漏电极。 活性结构被配置成沿沟道层和活性结构之间的界面在沟道层中形成二维电子气（2DEG）。 栅电极和漏电极在它们之间限定第一空间。 衬底具有直接位于栅电极和漏电极之间的第一空间下的第一部分，并且第一部分具有小于本征硅的第一电导率值和大于本征硅的热导率值。
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公开(公告)号：US20240332396A1
公开(公告)日：2024-10-03
申请号：US18194199
申请日：2023-03-31
发明人： Chi-Ming CHEN , Chia-Shiung TSAI , Eugene CHEN , Chung-Yuan LI
CPC分类号： H01L29/66462 , B32B43/006 , B32B2310/0843
摘要： Some implementations described herein provide a temporary carrier structure and techniques to form a semiconductor device on the temporary carrier structure. The temporary carrier structure includes a core layer formed from a material having a first bandgap lattice constant. The temporary carrier structure further includes a debonding layer formed from another material having a second bandgap energy constant that is lesser relative to the first bandgap lattice constant. Techniques to form the semiconductor device including a forming substrate layer of the semiconductor device on the temporary carrier structure, where a material of the substrate layer and the material of the core layer have a same approximate coefficient of thermal expansion. The techniques further include providing energy (e.g., electromagnetic waves from a laser source) to the debonding layer to remove the core layer from the temporary carrier structure.
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公开(公告)号：US20150021660A1
公开(公告)日：2015-01-22
申请号：US13944672
申请日：2013-07-17
发明人： Chi-Ming CHEN , Chih-Wen HSIUNG , Po-Chun LIU , Ming-Chang CHING , Chung-Yi YU , Xiaomeng CHEN
IPC分类号： H01L29/778 , H01L29/66
CPC分类号： H01L29/7783 , H01L29/2003 , H01L29/66462
摘要： A transistor includes a substrate and a buffer layer on the substrate, wherein the buffer layer comprises p-type dopants. The transistor further includes a channel layer on the buffer layer and a back-barrier layer between a first portion of the channel layer and a second portion of the channel layer. The back-barrier layer has a band gap discontinuity with the channel layer. The transistor further includes an active layer on the second portion of the channel layer, wherein the active layer has a band gap discontinuity with the second portion of the channel layer. The transistor further includes a two dimensional electron gas (2-DEG) in the channel layer adjacent an interface between the channel layer and the active layer.
摘要翻译： 晶体管包括衬底和衬底上的缓冲层，其中缓冲层包括p型掺杂剂。 晶体管还包括缓冲层上的沟道层和沟道层的第一部分和沟道层的第二部分之间的背面阻挡层。 后阻挡层与沟道层具有带隙不连续性。 晶体管还包括在沟道层的第二部分上的有源层，其中有源层与沟道层的第二部分具有带隙不连续性。 晶体管还包括在沟道层中与沟道层和有源层之间的界面相邻的二维电子气（2-DEG）。
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公开(公告)号：US20230387203A1
公开(公告)日：2023-11-30
申请号：US17804751
申请日：2022-05-31
发明人： Chi-Ming CHEN , Kuei-Ming CHEN , Yung-Chang CHANG
IPC分类号： H01L29/08 , H01L29/20 , H01L29/207 , H01L21/223 , H01L29/06 , H01L21/02 , H01L21/306
CPC分类号： H01L29/0847 , H01L29/2003 , H01L29/207 , H01L21/2233 , H01L29/0657 , H01L21/02576 , H01L21/30612 , H01L31/112
摘要： Depositing gallium nitride and carbon (GaN:C) (e.g., in the form of composite layers) when forming a gallium nitride drain of a transistor provides a buffer between the gallium nitride of the drain and silicon of a substrate in which the drain is formed. As a result, gaps and other defects caused by lattice mismatch are reduced, which improves electrical performance of the drain. Additionally, current leakage into the substrate is reduced, which further improves electrical performance of the drain. Additionally, or alternatively, implanting silicon in an aluminum nitride (AlN) liner for a gallium nitride drain reduces contact resistance at an interface between the gallium nitride and the silicon. As a result, electrical performance of the transistor is improved.
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公开(公告)号：US20210050209A1
公开(公告)日：2021-02-18
申请号：US17089147
申请日：2020-11-04
发明人： Po-Chun LIU , Chung-Chieh HSU , Chi-Ming CHEN , Chung-Yi YU , Chen-Hao CHIANG , Min-Chang CHING
IPC分类号： H01L21/02 , H01L29/66 , H01L29/778 , H01L29/45
摘要： A high electron mobility transistor includes: a first semiconductor layer over a substrate, and a second semiconductor layer over the first semiconductor layer, the second semiconductor layer having a band gap discontinuity with the first semiconductor layer, and at the first semiconductor layer and/or the second conductive layer includes indium. A top layer is over the second semiconductor layer, and a metal layer is over, and extends into, the top layer, the top layer separating the metal layer from the second semiconductor layer. A gate electrode is over the top layer, a third semiconductor layer being between the gate electrode and the top layer, where a sidewall of the third semiconductor layer and a sidewall of the metal layer are separated. A source and drain are on opposite sides of the gate electrode, the top layer extending continuously from below the source, below the gate electrode, and below the drain.
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公开(公告)号：US20160071969A1
公开(公告)日：2016-03-10
申请号：US14931009
申请日：2015-11-03
发明人： Chen-Hao CHIANG , Po-Chun LIU , Chi-Ming CHEN , Min-Chang CHING , Chung-Yi YU , Chia-Shiung TSAI , Ru-Liang LEE
IPC分类号： H01L29/778 , H01L23/31 , H01L29/205 , H01L29/20 , H01L29/45
CPC分类号： H01L29/7784 , H01L21/18 , H01L21/182 , H01L21/2258 , H01L21/3245 , H01L23/3171 , H01L29/2003 , H01L29/205 , H01L29/452 , H01L29/66431 , H01L29/66462 , H01L29/7786 , H01L29/7787 , H01L31/18 , H01L31/1848 , H01L33/002 , H01L33/0025 , H01L2924/0002 , H01L2924/10323 , H01L2924/10344 , H01L2924/00
摘要： A semiconductor device includes a substrate, a first layer over the substrate, a second layer over the first layer, and a third layer over the second layer. The third layer has a first portion and a second portion. The first portion of the third layer is separated from the second portion of the third layer. The semiconductor device also includes a first blended region beneath the first portion of the third layer. The first blended region includes aluminum atoms drawn from the first layer into at least the second layer. The semiconductor device further includes a second blended region beneath the second portion of the third layer. The second blended region includes aluminum atoms drawn from the first layer into at least the second layer. The semiconductor device also includes a source contact and a drain contact.
摘要翻译： 半导体器件包括衬底，衬底上的第一层，第一层上的第二层和第二层上的第三层。 第三层具有第一部分和第二部分。 第三层的第一部分与第三层的第二部分分离。 半导体器件还包括在第三层的第一部分下方的第一混合区域。 第一共混区域包括从第一层吸收到至少第二层的铝原子。 半导体器件还包括在第三层的第二部分下方的第二混合区域。 第二共混区域包括从第一层被抽吸到至少第二层的铝原子。 半导体器件还包括源极接触和漏极接触。
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公开(公告)号：US20210036140A1
公开(公告)日：2021-02-04
申请号：US17074952
申请日：2020-10-20
发明人： Chi-Ming CHEN , Po-Chun LIU , Chung-Yi YU , Chia-Shiung TSAI , Ru-Liang LEE
IPC分类号： H01L29/778 , H01L29/20 , H01L29/66 , H01L21/02
摘要： A semiconductor device includes a doped substrate and a seed layer in direct contact with the substrate. The seed layer includes a first seed sublayer having a first lattice structure. The first seed layer is doped with carbon. The seed layer further includes a second seed sublayer over the first see layer, wherein the second seed layer has a second lattice structure. The semiconductor device further includes a graded layer in direct contact with the seed layer. The graded layer includes a first graded sublayer including AlGaN having a first Al:Ga ratio; a second graded sublayer including AlGaN having a second Al:Ga ratio different from the first Al:Ga ratio; and a third graded sublayer over including AlGaN having a third Al:Ga ratio different from the second Al:Ga ratio. The semiconductor device includes a channel layer over the graded layer. The semiconductor device includes an active layer over the channel layer.
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