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公开(公告)号：US20250141354A1
公开(公告)日：2025-05-01
申请号：US19007022
申请日：2024-12-31
Inventor： Chung-Cheng Chou , Tien-Yen Wang
Abstract: A system includes a charge pump system having a plurality of enable signal input terminals and an output terminal, the charge pump system configured to provide an output voltage at the output terminal; and a detection circuit connected to the enable terminals and the output terminal of the charge pump system, the detection circuit configured to compare the charge pump system output voltage to a plurality of predefined input detection voltage levels, and to selectively output a plurality of enable signals to the charge pump system enable signal input terminals in response to the comparison.
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公开(公告)号：US20250021120A9
公开(公告)日：2025-01-16
申请号：US17877115
申请日：2022-07-29
Inventor： Zheng-Jun Lin , Chung-Cheng Chou , Yu-Der Chih , Chin-I Su
Abstract: A voltage regulator circuit is provided. The voltage regulator circuit includes a voltage regulator configured to provide an output voltage at an output terminal. A plurality of macros are connectable at a plurality of connection nodes of a connector connected to the output terminal of the voltage regulator. A feedback circuit having a plurality of feedback loops is connectable to the plurality of connection nodes. The feedback loop of the plurality of feedback loops, when connected to a connection node of the plurality of connection nodes, is configured to provide an instantaneous voltage of the connection node as a feedback to the voltage regulator. The voltage regulator is configured, in response to the instantaneous voltage, regulate the output voltage to maintain the instantaneous voltage of the connection node approximately equal to a reference voltage.
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公开(公告)号：US20240257870A1
公开(公告)日：2024-08-01
申请号：US18630241
申请日：2024-04-09
Inventor： Zheng-Jun Lin , Chung-Cheng Chou , Yu-Der Chih , Pei-Ling Tseng
IPC: G11C13/00
CPC classification number: G11C13/0064 , G11C13/003 , G11C13/004
Abstract: The disclosed invention presents a self-tracking reference circuit that compensates for IR drops and achieves the target resistance state at different temperatures after write operations. The disclosed self-tracking reference circuit includes a replica access path, a configurable resistor network, a replica selector mini-array and a step current generator that track PVT variations to provide a PVT tracking level for RRAM verify operation.
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公开(公告)号：US11735238B2
公开(公告)日：2023-08-22
申请号：US17855107
申请日：2022-06-30
Inventor： Chien-An Lai , Chung-Cheng Chou , Yu-Der Chih
CPC classification number: G11C7/222 , G11C7/106 , G11C7/1087 , G11C7/14 , G11C13/004 , G11C13/0026 , G11C13/0038 , G11C13/0069
Abstract: A memory device is provided, the memory device includes multiple cells arranged in a matrix of multiple rows and multiple columns. The memory device further includes multiple bit lines each of which is connected to first cells of the multiple cells arranged in a row of the multiple rows. A voltage control circuit is connectable to a selected bit line of the multiple bit lines and includes a voltage detection circuit that detects an instantaneous supply voltage and a voltage source selection circuit connected to the voltage detection circuit. The voltage source selection circuit selects a voltage source from multiple voltage sources based on the detected instantaneous supply voltage. The voltage source selection circuit includes a switch that connects the selected voltage source to the selected bit line to provide a write voltage.
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公开(公告)号：US11715518B2
公开(公告)日：2023-08-01
申请号：US17470849
申请日：2021-09-09
Inventor： Zheng-Jun Lin , Chin-I Su , Pei-Ling Tseng , Chung-Cheng Chou
IPC: G11C13/00
CPC classification number: G11C13/0028 , G11C13/003 , G11C13/0026 , G11C13/0038 , G11C13/0069 , G11C2213/79
Abstract: In some aspects of the present disclosure, a memory device is disclosed. In some aspects, the memory device includes a first voltage regulator to receive a word line voltage provided to a memory array; a resistor network coupled to the first voltage regulator to provide an inhibit voltage to the memory array, wherein the resistor network comprises a plurality of resistors and wherein each of the resistors are coupled in series to an adjacent one of the plurality of resistors; and a switch network comprising a plurality of switches, wherein each of the switches are coupled to a corresponding one of the plurality of resistors and to the memory array via a second voltage regulator.
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Patent Agency Ranking
公开(公告)号：US20230065104A1
公开(公告)日：2023-03-02
申请号：US17981977
申请日：2022-11-07
Inventor： Zheng-Jun Lin , Chung-Cheng Chou , Yu-Der Chih , Pei-Ling Tseng
IPC: G11C13/00
Abstract: The disclosed invention presents a self-tracking reference circuit that compensates for IR drops and achieves the target resistance state at different temperatures after write operations. The disclosed self-tracking reference circuit includes a replica access path, a configurable resistor network, a replica selector mini-array and a step current generator that track PVT variations to provide a PVT tracking level for RRAM verify operation.
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公开(公告)号：US20220366980A1
公开(公告)日：2022-11-17
申请号：US17816005
申请日：2022-07-29
Inventor： Chung-Cheng Chou , Tien-Yen Wang
IPC: G11C13/00
Abstract: A memory device includes a memory array including a plurality of memory cells arranged in rows and columns. A closed loop bias generator is configured to output a column select signal to the memory array. A current limiter receives an output of the closed loop bias generator. The current limiter is coupled to a plurality of the columns of the memory array.
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公开(公告)号：US20220359008A1
公开(公告)日：2022-11-10
申请号：US17825566
申请日：2022-05-26
Inventor： Zheng-Jun Lin , Chung-Cheng Chou , Pei-Ling Tseng
Abstract: A memory device includes a memory cell and a sense amplifier. The sense amplifier has a reference circuit configured to output a reference voltage and a sensing circuit connected to the memory cell. A comparator includes a first input and a second input, with the first input connected to the reference circuit to receive the reference voltage, and the second input connected to the memory cell. A precharger is configured to selectively precharge the sensing circuit to a predetermined precharge voltage
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公开(公告)号：US11348638B2
公开(公告)日：2022-05-31
申请号：US17000980
申请日：2020-08-24
Inventor： Zheng-Jun Lin , Chung-Cheng Chou , Pei-Ling Tseng
Abstract: A memory device includes a memory cell and a sense amplifier. The sense amplifier has a reference circuit configured to output a reference voltage and a sensing circuit connected to the memory cell. A comparator includes a first input and a second input, with the first input connected to the reference circuit to receive the reference voltage, and the second input connected to the memory cell. A precharger is configured to selectively precharge the sensing circuit to a predetermined precharge voltage.
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公开(公告)号：US20210241830A1
公开(公告)日：2021-08-05
申请号：US17106725
申请日：2020-11-30
Inventor： Zheng-Jun Lin , Chung-Cheng Chou , Yu-Der Chih , Pei-Ling Tseng
IPC: G11C13/00
Abstract: The disclosed invention presents a self-tracking reference circuit that compensates for IR drops and achieves the target resistance state at different temperatures after write operations. The disclosed self-tracking reference circuit includes a replica access path, a configurable resistor network, a replica selector mini-array and a step current generator that track PVT variations to provide a PVT tracking level for RRAM verify operation.
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