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公开(公告)号：US20240186258A1
公开(公告)日：2024-06-06
申请号：US18420972
申请日：2024-01-24
发明人： Yeong-Jyh Lin , Ching I Li , De-Yang Chiou , Sz-Fan Chen , Han-Jui Hu , Ching-Hung Wang , Ru-Liang Lee , Chung-Yi Yu
IPC分类号： H01L23/544 , G03F1/42 , G03F1/70 , H01L21/027 , H01L21/66 , H01L21/683
CPC分类号： H01L23/544 , G03F1/42 , G03F1/70 , H01L21/0274 , H01L21/6835 , H01L22/20 , H01L2221/68309 , H01L2223/54426
摘要： Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. An alignment process is performed on a first semiconductor workpiece and a second semiconductor workpiece by virtue of a plurality of workpiece pins. The first semiconductor workpiece is bonded to the second semiconductor workpiece. A shift value is determined between the first and second semiconductor workpieces by virtue of a first plurality of alignment marks on the first semiconductor workpiece and a second plurality of alignment marks on the second semiconductor workpiece. A layer of an integrated circuit (IC) structure is formed over the second semiconductor workpiece based at least in part on the shift value.
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公开(公告)号：US20230033270A1
公开(公告)日：2023-02-02
申请号：US17680987
申请日：2022-02-25
IPC分类号： H01L27/146
摘要： The present disclosure relates to an integrated chip. The integrated chip includes a sensor semiconductor layer. The sensor semiconductor layer is doped with a first dopant. A photodetector is along a frontside of the sensor semiconductor layer. A backside semiconductor layer is along a backside of the sensor semiconductor layer, opposite the frontside. The backside semiconductor layer is doped with a second dopant. A diffusion barrier structure is between the sensor semiconductor layer and the backside semiconductor layer. The diffusion barrier structure includes a third dopant different from the first dopant and the second dopant.
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公开(公告)号：US20220384496A1
公开(公告)日：2022-12-01
申请号：US17883668
申请日：2022-08-09
发明人： Yu-Hung Cheng , Chun-Tsung Kuo , Jiech-Fun Lu , Min-Ying Tsai , Chiao-Chun Hsu , Ching I Li
IPC分类号： H01L27/146
摘要： The present disclosure relates to an image sensor having a photodiode surrounded by a back-side deep trench isolation (BDTI) structure, and an associated method of formation. In some embodiments, a plurality of pixel regions is disposed within an image sensing die and respectively comprises a photodiode configured to convert radiation into an electrical signal. The photodiode comprises a photodiode doping column with a first doping type surrounded by a photodiode doping layer with a second doping type that is different than the first doping type. A BDTI structure is disposed between adjacent pixel regions and extending from the back-side of the image sensor die to a position within the photodiode doping layer. The BDTI structure comprises a doped liner with the second doping type and a dielectric fill layer. The doped liner lines a sidewall surface of the dielectric fill layer.
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公开(公告)号：US11916022B2
公开(公告)日：2024-02-27
申请号：US17834235
申请日：2022-06-07
发明人： Yeong-Jyh Lin , Ching I Li , De-Yang Chiou , Sz-Fan Chen , Han-Jui Hu , Ching-Hung Wang , Ru-Liang Lee , Chung-Yi Yu
IPC分类号： H01L23/544 , G03F1/42 , G03F1/70 , H01L21/027 , H01L21/66 , H01L21/683
CPC分类号： H01L23/544 , G03F1/42 , G03F1/70 , H01L21/0274 , H01L21/6835 , H01L22/20 , H01L2221/68309 , H01L2223/54426
摘要： Various embodiments of the present disclosure are directed towards a semiconductor processing system including an overlay (OVL) shift measurement device. The OVL shift measurement device is configured to determine an OVL shift between a first wafer and a second wafer, where the second wafer overlies the first wafer. A photolithography device is configured to perform one or more photolithography processes on the second wafer. A controller is configured to perform an alignment process on the photolithography device according to the determined OVL shift. The photolithography device performs the one or more photolithography processes based on the OVL shift.
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公开(公告)号：US20240021642A1
公开(公告)日：2024-01-18
申请号：US18355467
申请日：2023-07-20
发明人： Min-Ying Tsai , Cheng-Te Lee , Rei-Lin Chu , Ching I Li , Chung-Yi Yu
IPC分类号： H01L27/146
CPC分类号： H01L27/1463 , H01L27/14689 , H01L27/14698
摘要： The present disclosure relates to an image sensor comprising a substrate. A photodetector is in the substrate. A trench is in the substrate and is defined by sidewalls and an upper surface of the substrate. A first isolation layer extends along the sidewalls and the upper surface of the substrate that define the trench. The first isolation layer comprises a first dielectric material. A second isolation layer is over the first isolation layer. The second isolation layer lines the first isolation layer. The second isolation layer comprises a second dielectric material. A third isolation layer is over the second isolation layer. The third isolation layer fills the trench and lines the second isolation layer. The third isolation layer comprises a third material. A ratio of a first thickness of the first isolation layer to a second thickness of the second isolation layer is about 0.17 to 0.38.
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公开(公告)号：US20230378217A1
公开(公告)日：2023-11-23
申请号：US18366806
申请日：2023-08-08
发明人： Min-Ying Tsai , Ching I Li
IPC分类号： H01L27/146
CPC分类号： H01L27/1463 , H01L27/14636 , H01L27/14683 , H01L27/14643
摘要： The present disclosure relates to an image sensor having an epitaxial deposited photodiode structure surrounded by an isolation structure, and an associated method of formation. In some embodiments, a first epitaxial deposition process is performed to form a first doped EPI layer over a substrate. The first doped EPI layer is of a first doping type. Then, a second epitaxial deposition process is performed to form a second doped EPI layer on the first doped photodiode layer. The second doped EPI layer is of a second doping type opposite from the first doping type. Then, an isolation structure is formed to separate the first doped EPI layer and the second photodiode as a plurality of photodiode structures within a plurality of pixel regions. The plurality of photodiode structures is configured to convert radiation that enters from a first side of the image sensor into an electrical signal.
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公开(公告)号：US20230343883A1
公开(公告)日：2023-10-26
申请号：US18335171
申请日：2023-06-15
发明人： Kai-Yun Yang , Chun-Yuan Chen , Ching I Li
IPC分类号： H01L31/18 , H01L31/0304 , H01L31/0352 , H01L31/103 , H01L27/146
CPC分类号： H01L31/03042 , H01L27/14643 , H01L27/14698 , H01L31/03529 , H01L31/1035 , H01L31/1864
摘要： Various embodiments of the present disclosure are directed towards an image sensor having a photodetector disposed in a semiconductor substrate. The photodetector comprises a first doped region comprising a first dopant having a first doping type. A deep well region extends from a back-side surface of the semiconductor substrate to a top surface of the first doped region. A second doped region is disposed within the semiconductor substrate and abuts the first doped region. The second doped region and the deep well region comprise a second dopant having a second doping type opposite the first doping type. An isolation structure is disposed within the semiconductor substrate. The isolation structure extends from the back-side surface of the semiconductor substrate to a point below the back-side surface. A doped liner is disposed between the isolation structure and the second doped region. The doped liner comprises the second dopant.
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公开(公告)号：US11688717B2
公开(公告)日：2023-06-27
申请号：US17412596
申请日：2021-08-26
发明人： Ching-Hung Wang , Yeong-Jyh Lin , Ching I Li , Tzu-Wei Yu , Chung-Yi Yu
CPC分类号： H01L24/83 , H01L21/681 , H01L24/98 , H01L2224/8393 , H01L2224/83136
摘要： Various embodiments of the present disclosure are directed towards a method for forming a semiconductor structure. The method includes loading a first wafer and a second wafer onto a bonding platform such that the second wafer overlies the first wafer. An alignment process is performed to align the second wafer over the first wafer by virtue of a plurality of wafer pins, where a plurality of first parameters are associated with the wafer pins during the alignment process. The second wafer is bonded to the first wafer. An overlay (OVL) measurement process is performed on the first wafer and the second wafer by virtue of the plurality of wafer pins, where a plurality of second parameters are associated with the wafer pins during the alignment process. An OVL shift is determined between the first wafer and the second wafer based on a comparison between the first parameters associated with the wafer pins during the alignment process and the second parameters associated with the wafer pins during the OVL measurement process.
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公开(公告)号：US20230066893A1
公开(公告)日：2023-03-02
申请号：US17412596
申请日：2021-08-26
发明人： Ching-Hung Wang , Yeong-Jyh Lin , Ching I Li , Tzu-Wei Yu , Chung-Yi Yu
摘要： Various embodiments of the present disclosure are directed towards a method for forming a semiconductor structure. The method includes loading a first wafer and a second wafer onto a bonding platform such that the second wafer overlies the first wafer. An alignment process is performed to align the second wafer over the first wafer by virtue of a plurality of wafer pins, where a plurality of first parameters are associated with the wafer pins during the alignment process. The second wafer is bonded to the first wafer. An overlay (OVL) measurement process is performed on the first wafer and the second wafer by virtue of the plurality of wafer pins, where a plurality of second parameters are associated with the wafer pins during the alignment process. An OVL shift is determined between the first wafer and the second wafer based on a comparison between the first parameters associated with the wafer pins during the alignment process and the second parameters associated with the wafer pins during the OVL measurement process.
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公开(公告)号：US20240355855A1
公开(公告)日：2024-10-24
申请号：US18354217
申请日：2023-07-18
发明人： Yu-Hung Cheng , Szu-Yu Wang , Ching I Li
IPC分类号： H01L27/146
CPC分类号： H01L27/1463 , H01L27/14689 , H01L27/1464
摘要： The problem of forming a deep trench isolation (DTI) structure suitable for photodetectors having a narrow pitch is solved by a process in which a p-doped epitaxial layer is grown on the sidewalls of trenches formed by etching. The epitaxial layer becomes part of the active region of any adjacent photodetectors and narrows the DTI structure that is formed by dielectric in the trenches. The epitaxial layer may be allowed to close the trench mouths and to grow on the front side. Floating diffusion regions and the like may then be formed directly over the DTI structure. Optionally, dislocations in the epitaxial layer are removed by laser annealing. Optionally the epitaxial layer is planarized after annealing. The trenches may be accessed from the back side by thinning the substrate, whereupon the trenches may be partially or completely filled with dielectric to form the DTI structure.
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