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    Substrate bias control circuit
    3.
    发明授权
    Substrate bias control circuit 有权
    基板偏置控制电路

    公开(公告)号：US09158324B2

    公开(公告)日：2015-10-13

    申请号：US14025171

    申请日：2013-09-12

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    Inventor： Shyh-An Chi ,  Shiue Tsong Shen ,  Jyy Anne Lee ,  Yun-Han Lee

    IPC: G05F3/08 ,  H03K17/14 ,  G05F3/20 ,  H03K19/003

    CPC classification number: G05F3/205 ,  H03K19/00384

    Abstract: An integrated circuit includes a process voltage temperature (PVT) effect transducer responsive to a PVT effect, a PVT effect quantifier coupled to the PVT effect transducer and configured to quantify the PVT effect to provide an output, and a bias controller configured to receive the output of the PVT effect quantifier and provide a bias voltage for a substrate of an NMOS or a PMOS transistor. The bias controller is configured to compare the output received from the PVT effect quantifier to a threshold value, and decrease or increase the bias voltage depending on whether the output is higher or lower than the threshold value.

    Abstract translation: 集成电路包括响应于PVT效应的过程电压温度（PVT）效应传感器，耦合到PVT效应传感器并被配置为量化PVT效应以提供输出的PVT效应量化器，以及配置成接收输出的偏置控制器 的PVT效应量化器，并为NMOS或PMOS晶体管的衬底提供偏置电压。 偏置控制器被配置为将从PVT效应量化器接收的输出与阈值进行比较，并且根据输出是高于还是低于阈值来降低或增加偏置电压。

    SUBSTRATE BIAS CONTROL CIRCUIT
    4.
    发明申请
    SUBSTRATE BIAS CONTROL CIRCUIT 有权
    基板偏置控制电路

    公开(公告)号：US20140015599A1

    公开(公告)日：2014-01-16

    申请号：US14025171

    申请日：2013-09-12

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    Inventor： Shyh-An Chi ,  Shiue Tsong Shen ,  Jyy Anne Lee ,  Yun-Han Lee

    IPC: G05F3/20

    CPC classification number: G05F3/205 ,  H03K19/00384

    Abstract: An integrated circuit includes a process voltage temperature (PVT) effect transducer responsive to a PVT effect, a PVT effect quantifier coupled to the PVT effect transducer and configured to quantify the PVT effect to provide an output, and a bias controller configured to receive the output of the PVT effect quantifier and provide a bias voltage for a substrate of an NMOS or a PMOS transistor. The bias controller is configured to compare the output received from the PVT effect quantifier to a threshold value, and decrease or increase the bias voltage depending on whether the output is higher or lower than the threshold value.

    Abstract translation: 集成电路包括响应于PVT效应的过程电压温度（PVT）效应传感器，耦合到PVT效应传感器并被配置为量化PVT效应以提供输出的PVT效应量化器，以及配置成接收输出的偏置控制器 的PVT效应量化器，并为NMOS或PMOS晶体管的衬底提供偏置电压。 偏置控制器被配置为将从PVT效应量化器接收的输出与阈值进行比较，并且根据输出是高于还是低于阈值来降低或增加偏置电压。

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