Method Of Critical Dimension Control By Oxygen And Nitrogen Plasma Treatment In Euv Mask

    公开(公告)号:US20230280645A1

    公开(公告)日:2023-09-07

    申请号:US18317368

    申请日:2023-05-15

    IPC分类号: G03F1/24 G03F7/20 G03F1/70

    CPC分类号: G03F1/24 G03F1/70 G03F7/2004

    摘要: The present disclosure describes a method of patterning a semiconductor wafer using extreme ultraviolet lithography (EUVL). The method includes receiving an EUVL mask that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further includes patterning the absorber layer to form a trench on the EUVL mask, wherein the trench has a first width above a target width. The method further includes treating the EUVL mask with oxygen plasma to reduce the trench to a second width, wherein the second width is below the target width. The method may also include treating the EUVL mask with nitrogen plasma to protect the capping layer, wherein the treating of the EUVL mask with the nitrogen plasma expands the trench to a third width at the target width.

    EUV photo masks and manufacturing method thereof

    公开(公告)号:US11506969B2

    公开(公告)日:2022-11-22

    申请号:US17109833

    申请日:2020-12-02

    IPC分类号: G03F1/24

    摘要: A reflective mask includes a substrate, a reflective multilayer disposed over the substrate, a capping layer disposed over the reflective multilayer, an intermediate layer disposed over the capping layer, an absorber layer disposed over the intermediate layer, and a cover layer disposed over the absorber layer. The intermediate layer includes a material having a lower hydrogen diffusivity than a material of the capping layer.

    Reticle container
    3.
    发明授权

    公开(公告)号:US11237477B2

    公开(公告)日:2022-02-01

    申请号:US16012253

    申请日:2018-06-19

    IPC分类号: G03F1/66 G03F7/20 H01L21/673

    摘要: A mask container for storing a mask for photolithography, includes a cover and a base having a plurality of tapered corners. The tapered corners taper outward and downward from a top major surface of the base. The cover having the tapered corners extends downward that covers the tapered corners of the base when the cover is attached to the base. The tapered corners of the cover are tapered at about the same angle as the tapered corners of the base so that a surface of the tapered corners of the cover is substantially parallel to a corresponding surface of the tapered corner of the base when the cover is attached to the base. A recess is located in the tapered corners of the cover. A biasing member and a ball-shaped member are located in the tapered corners of the base to mate with the recess when the cover is attached to the base.

    Mask for EUV lithography and method of manufacturing the same

    公开(公告)号:US11249384B2

    公开(公告)日:2022-02-15

    申请号:US16441700

    申请日:2019-06-14

    IPC分类号: G03F1/22

    摘要: A method of manufacturing an extreme ultraviolet (EUV) lithography mask includes forming an image pattern in an absorption layer of EUV mask blank. The EUV mask blank includes: a multilayer stack including alternating molybdenum (Mo) and silicon (Si) layers disposed over a first surface of a mask substrate, a capping layer disposed over the multilayer stack, and an absorption layer disposed over the capping layer. A border region surrounds the image pattern having a trench wherein the absorption layer, the capping layer and at least a portion of the multilayer stack are etched. Concave sidewalls are formed in the border region or an inter-diffused portion is formed in the multilayer stack of the trench.

    EUV masks to prevent carbon contamination

    公开(公告)号:US11221554B2

    公开(公告)日:2022-01-11

    申请号:US16746640

    申请日:2020-01-17

    IPC分类号: G03F1/24 G03F1/22

    摘要: An extreme ultra-violet (EUV) mask and method for fabricating the same is disclosed. For example, the EUV mask includes a substrate, a multi-layered mirror layer formed on the substrate, a metal capping layer formed on the multi-layered mirror layer, and a multi-layered absorber layer formed on the metal capping layer. The multi-layered absorber layer includes features etched into the multi-layered absorber layer to define structures on a semiconductor device.