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公开(公告)号：US10816597B2
公开(公告)日：2020-10-27
申请号：US15836363
申请日：2017-12-08
Applicant: Silicon Laboratories Inc.
Inventor： Huanhui Zhan , Krishna Pentakota , Stefan N. Mastovich
IPC: G01R31/317 , G01R31/316
Abstract: An integrated circuit includes a supply terminal to receive a supply voltage and a test terminal that operates in an input mode and an output mode. A test interface of the integrated circuit operates in a normal mode requiring a serial write to the test terminal to access test locations in the integrated circuit. The test interface also operates in an automatic mode in which addresses for test locations are auto incremented by toggling the supply voltage from a high voltage level to a low voltage level and back to the high voltage level. In an input mode, with the supply voltage at the low voltage level, the test pin receives configuration and address information. In output mode, with the supply voltage at the high voltage level, the test pin supplies test information corresponding to the address information received.
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公开(公告)号：US10812028B2
公开(公告)日：2020-10-20
申请号：US16660027
申请日：2019-10-22
Applicant: Silicon Laboratories Inc.
Inventor： Mohammad Al-Shyoukh , Krishna Pentakota , Stefan N. Mastovich
IPC: H03F3/217 , H02J50/05 , H02J50/80 , H02M3/335 , H02M5/458 , H02M7/797 , H02M1/08 , H01L29/66 , H02M3/338 , H02M1/34 , H02H9/00 , H03F3/04 , H01L29/78 , H02M1/00 , H02M1/32
Abstract: A power transfer device includes an oscillator circuit having a first node, a second node, and a control terminal. The oscillator circuit includes a cascode circuit comprising transistors having a first conductivity type and a first breakdown voltage. The cascode circuit is coupled to the control terminal, the first node, and the second node. The oscillator circuit includes a latch circuit coupled between the cascode circuit and a first power supply node. The latch circuit includes cross-coupled transistors having the first conductivity type and a second breakdown voltage. The first breakdown voltage is greater than the second breakdown voltage. The oscillator circuit may be configured to develop a pseudo-differential signal on the first node and the second node. The pseudo-differential signal may have a peak voltage of at least three times a voltage level of an input DC signal on a second power supply node.
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公开(公告)号：US20200052665A1
公开(公告)日：2020-02-13
申请号：US16660027
申请日：2019-10-22
Applicant: Silicon Laboratories Inc.
Inventor： Mohammad Al-Shyoukh , Krishna Pentakota , Stefan N. Mastovich
IPC: H03F3/217 , H01L29/66 , H02M1/08 , H02M7/797 , H02M5/458 , H02M3/335 , H02J50/80 , H02J50/05 , H02M3/338
Abstract: A power transfer device includes an oscillator circuit having a first node, a second node, and a control terminal. The oscillator circuit includes a cascode circuit comprising transistors having a first conductivity type and a first breakdown voltage. The cascode circuit is coupled to the control terminal, the first node, and the second node. The oscillator circuit includes a latch circuit coupled between the cascode circuit and a first power supply node. The latch circuit includes cross-coupled transistors having the first conductivity type and a second breakdown voltage. The first breakdown voltage is greater than the second breakdown voltage. The oscillator circuit may be configured to develop a pseudo-differential signal on the first node and the second node. The pseudo-differential signal may have a peak voltage of at least three times a voltage level of an input DC signal on a second power supply node.
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公开(公告)号：US20210193791A1
公开(公告)日：2021-06-24
申请号：US16726477
申请日：2019-12-24
Applicant: Silicon Laboratories Inc.
Inventor： Dan B. Kasha , Russell Croman , Stefan N. Mastovich , Thomas C. Fowler
Abstract: An integrated circuit has an isolation capacitor structure that reduces the risk of breakdown from high electric fields at the edge of the top metal plate of the capacitor. The capacitor structure includes a bottom metal plate above a substrate. A first dielectric layer of a first dielectric material is formed between the bottom metal plate and the top metal plate. The capacitor structure also includes a thin narrow ring formed of a second dielectric material located under a portion of the top metal plate. The second dielectric material has a higher dielectric constant than the first dielectric material. The thin narrow ring follows the shape of the edge of the top metal plate with a portion of the ring underneath the top metal plate and a portion outside the edge of the top metal plate to thereby be located at a place of the maximum electric field.
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公开(公告)号：US11205696B2
公开(公告)日：2021-12-21
申请号：US16726477
申请日：2019-12-24
Applicant: Silicon Laboratories Inc.
Inventor： Dan B. Kasha , Russell Croman , Stefan N. Mastovich , Thomas C. Fowler
Abstract: An integrated circuit has an isolation capacitor structure that reduces the risk of breakdown from high electric fields at the edge of the top metal plate of the capacitor. The capacitor structure includes a bottom metal plate above a substrate. A first dielectric layer of a first dielectric material is formed between the bottom metal plate and the top metal plate. The capacitor structure also includes a thin narrow ring formed of a second dielectric material located under a portion of the top metal plate. The second dielectric material has a higher dielectric constant than the first dielectric material. The thin narrow ring follows the shape of the edge of the top metal plate with a portion of the ring underneath the top metal plate and a portion outside the edge of the top metal plate to thereby be located at a place of the maximum electric field.
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Patent Agency Ranking
公开(公告)号：US10833535B2
公开(公告)日：2020-11-10
申请号：US16141052
申请日：2018-09-25
Applicant: Silicon Laboratories Inc.
Inventor： Mohammad Al-Shyoukh , Krishna Pentakota , Stefan N. Mastovich
Abstract: A power transfer device includes a first power supply node, a second power supply node, and an oscillator circuit configured to convert an input DC signal across the first power supply node and the second power supply node into an AC signal on a differential pair of nodes comprising a first node and a second node in response to a control signal. The oscillator circuit includes a regulated power supply node and an active shunt regulator circuit configured to clamp a peak voltage level across the regulated power supply node and the second power supply node to a clamped voltage level. The clamped voltage level is linearly related to a first voltage level on the first power supply node.
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公开(公告)号：US10511273B2
公开(公告)日：2019-12-17
申请号：US15835230
申请日：2017-12-07
Applicant: Silicon Laboratories Inc.
Inventor： Mohammad Al-Shyoukh , Krishna Pentakota , Stefan N. Mastovich
IPC: H03F3/217 , H02J50/05 , H02J50/80 , H02M3/335 , H02M5/458 , H02M7/797 , H02M1/08 , H01L29/66 , H02M3/338 , H02M1/34 , H02H9/00 , H03F3/04 , H01L29/78 , H02M1/00 , H02M1/32
Abstract: A power transfer device includes an oscillator circuit having a first node, a second node, and a control terminal. The oscillator circuit includes a cascode circuit comprising transistors having a first conductivity type and a first breakdown voltage. The cascode circuit is coupled to the control terminal, the first node, and the second node. The oscillator circuit includes a latch circuit coupled between the cascode circuit and a first power supply node. The latch circuit includes cross-coupled transistors having the first conductivity type and a second breakdown voltage. The first breakdown voltage is greater than the second breakdown voltage. The oscillator circuit may be configured to develop a pseudo-differential signal on the first node and the second node. The pseudo-differential signal may have a peak voltage of at least three times a voltage level of an input DC signal on a second power supply node.
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公开(公告)号：US20190181817A1
公开(公告)日：2019-06-13
申请号：US15835230
申请日：2017-12-07
Applicant: Silicon Laboratories Inc.
Inventor： Mohammad Al-Shyoukh , Krishna Pentakota , Stefan N. Mastovich
CPC classification number: H03F3/217 , H01L29/66106 , H01L29/66143 , H01L29/7816 , H02H9/005 , H02J50/05 , H02J50/80 , H02M1/08 , H02M1/32 , H02M1/34 , H02M3/33515 , H02M3/33592 , H02M3/3387 , H02M5/458 , H02M7/797 , H02M2001/0003 , H03F3/04 , H03F3/2171
Abstract: A power transfer device includes an oscillator circuit having a first node, a second node, and a control terminal. The oscillator circuit includes a cascode circuit comprising transistors having a first conductivity type and a first breakdown voltage. The cascode circuit is coupled to the control terminal, the first node, and the second node. The oscillator circuit includes a latch circuit coupled between the cascode circuit and a first power supply node. The latch circuit includes cross-coupled transistors having the first conductivity type and a second breakdown voltage. The first breakdown voltage is greater than the second breakdown voltage. The oscillator circuit may be configured to develop a pseudo-differential signal on the first node and the second node. The pseudo-differential signal may have a peak voltage of at least three times a voltage level of an input DC signal on a second power supply node.
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公开(公告)号：US20200099255A1
公开(公告)日：2020-03-26
申请号：US16141052
申请日：2018-09-25
Applicant: Silicon Laboratories Inc.
Inventor： Mohammad Al-Shyoukh , Krishna Pentakota , Stefan N. Mastovich
Abstract: A power transfer device includes a first power supply node, a second power supply node, and an oscillator circuit configured to convert an input DC signal across the first power supply node and the second power supply node into an AC signal on a differential pair of nodes comprising a first node and a second node in response to a control signal. The oscillator circuit includes a regulated power supply node and an active shunt regulator circuit configured to clamp a peak voltage level across the regulated power supply node and the second power supply node to a clamped voltage level. The clamped voltage level is linearly related to a first voltage level on the first power supply node.
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公开(公告)号：US10547312B2
公开(公告)日：2020-01-28
申请号：US15459226
申请日：2017-03-15
Applicant: Silicon Laboratories Inc.
Inventor： Ernest T. Stroud , Stefan N. Mastovich
Abstract: An integrated circuit includes an input terminal configured to receive an input signal, a reference voltage node configured to provide a control voltage, and a pass transistor comprising a first terminal coupled to a first node, a control terminal coupled to the reference voltage node, and a second terminal coupled to the input terminal. The control voltage has a control voltage level sufficient to allow a signal to pass from the second terminal to the first terminal. The pass transistor is configured to linearly transfer the input signal to the first node in response to a voltage level of the input signal being below a first voltage level and configured to transfer a voltage-limited version of the input signal to the first node in response to the voltage level being above the first voltage level. At most, a negligible DC current flows through the input terminal into the second terminal.
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