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公开(公告)号：US12085595B2
公开(公告)日：2024-09-10
申请号：US17965539
申请日：2022-10-13
发明人： Minsung Kim , Suhwan Kim , Hyunjoong Lee
CPC分类号： G01R27/2605 , H03F3/45475 , G01D5/24 , H03F2203/45116
摘要： A read-out circuit includes an operational amplifier configured to receive input voltage via a positive input terminal; a feedback capacitor connected between an output terminal of the operational amplifier and a negative input terminal of the operational amplifier; a sensor charging/discharging circuit configured to charge or to discharge a sensor capacitor included in a sensor during a first time; and a switching circuit configured to connect the sensor capacitor and the operational amplifier during a second time after the sensor capacitor is charged or discharged.
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公开(公告)号：US11892327B2
公开(公告)日：2024-02-06
申请号：US17828269
申请日：2022-05-31
发明人： Minsung Kim , Hyunjoong Lee , Suhwan Kim
CPC分类号： G01D5/24 , G01R27/2605 , G01R29/0871
摘要： A read-out circuit includes an operational amplifier configured to receive an input voltage through a positive input terminal; a feedback capacitor connected between an output terminal of the operational amplifier and a negative input terminal of the operational amplifier; a sensor charging and discharging circuit configured to charge or discharge a sensor during a first time; a switching circuit connecting the sensor and the operational amplifier during a second time after the sensor is charged or discharged; and a duty control circuit configured to determine a duty ratio of the first time and the second time according to a capacitance of the sensor.
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公开(公告)号：US11316520B2
公开(公告)日：2022-04-26
申请号：US17164627
申请日：2021-02-01
发明人： Changho Hyun , Suhwan Kim
IPC分类号： H03K17/16 , H03K19/017 , H03K19/17728 , H03K19/173 , H03K19/09 , H03K19/0185
摘要： A transmitter includes a driving circuitry configured to drive a channel coupled to an output node by controlling an output impedance of a pull-up path, an output impedance of a pull-down path, or both, according to one or more multi-bit data signals, a pull-up control signal, and a pull-down control signal; a driving control circuit configured to generate the pull-up control signal and the pull-down control signal according to one or more calibration signals and the multi-bit data signals or according to the calibration signals and one or more duplicate multi-bit data signals, the duplicate multi-bit data signals duplicating the multi-bit data signals; and a look-up table storing values of the calibration signals.
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公开(公告)号：US10938398B2
公开(公告)日：2021-03-02
申请号：US16790598
申请日：2020-02-13
发明人： Suhwan Kim , Junsoo Cho , Youngtae Yang
摘要： An analog-to-digital converter (ADC) includes a first operator configured to subtract an analog value from an analog signal; an amplifier configured to amplify an output of the first selector; a filter configured to filter an output of the amplifier; a quantizer configured to generate a digital bit stream from an output of the filter; and a digital-to-analog converter (DAC) configured to output the analog value according to the digital bit stream.
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5.发明授权公开(公告)号：US10582162B2
公开(公告)日：2020-03-03
申请号：US15575502
申请日：2016-05-19
发明人： Suhwan Kim , Sumin Kim
IPC分类号： H04N7/18 , H04N5/232 , H04N5/247 , G08B13/196 , G08B25/08 , G01S19/49 , G01S5/02 , G01S5/00 , G01S19/13
摘要： An image information collecting system comprises: a position transmitting device for transmitting first position information indicating a position of the image information collecting system itself; a plurality of cameras for collecting image data, storing the image data in a storage medium of the image information collecting system itself, generating data identification including oriented direction information of a camera and time information at a time point at which the image data has been collected, and transmitting the data identification information through a network; and a service server for receiving the first position information and the data identification information, and determining whether a target camera for photographing a current position of the position transmitting device exists among the plurality of cameras, using the data identification information and second position information indicating positions of the plurality of cameras.
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公开(公告)号：US10348538B2
公开(公告)日：2019-07-09
申请号：US16000536
申请日：2018-06-05
发明人： Hyeongjun Ko , Mino Kim , Suhwan Kim , Deog-Kyoon Jeong
IPC分类号： H04L27/01 , H04L25/02 , H04L25/497 , H04L25/03
摘要： A transmitter may include a driver having a PMOS transistor and an NMOS transistor connected in series between a first power supply and a second power supply. The driver may be configured to output an output signal. The transmitter may further include a driver control circuit configured to control a gate voltage of the PMOS transistor and a gate voltage of the NMOS transistor based on a level of a data signal, an occurrence of a level transition of the data signal, and a direction of the level transition of the data signal.
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公开(公告)号：US10263604B2
公开(公告)日：2019-04-16
申请号：US15590864
申请日：2017-05-09
发明人： Joohyung Chae , Hankyu Chi , Suhwan Kim , Deog-Kyoon Jeong
IPC分类号： H03K4/06 , H03K4/501 , H03K5/1534
摘要： A triangular wave generator includes a wave generator configured to generate a triangular wave according to a clock signal and a control signal. The triangular wave generator further includes a wave controller configured to adjust a value of the control signal in a correction mode. The control signal includes a first bias control signal, a second bias control signal, and a capacitance control signal.
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公开(公告)号：US09071232B2
公开(公告)日：2015-06-30
申请号：US13906013
申请日：2013-05-30
发明人： Kwan-Dong Kim , Suhwan Kim , Gi-Moon Hong
CPC分类号： H03K3/0322 , H03L7/087 , H03L7/0995
摘要： An integrated circuit includes a ring oscillator including delay cells having a delay value and configured to generate two or more periodic waves, a first phase controller configured to compare the phase of a first selected periodic wave to the phase of a reference wave and change the delay value of the delay cells from a first delay value to a second delay value based on a first comparison signal corresponding to a phase difference between the first selected periodic wave and the reference wave, and a second phase controller configured to compare the phase of a second selected periodic wave to the phase of the reference wave and restore the delay value of the delay cells from the second delay value to the first delay value based on a second comparison signal corresponding to a phase difference between the second selected periodic wave and the reference wave.
摘要翻译： 集成电路包括环形振荡器，其包括具有延迟值并被配置为产生两个或多个周期波的延迟单元;第一相位控制器，被配置为将第一选定周期波的相位与参考波的相位进行比较，并改变延迟 基于与第一选定周期波和参考波之间的相位差对应的第一比较信号，将延迟单元的值从第一延迟值延迟到第二延迟值;以及第二相位控制器，被配置为将第二延迟单元 选择的周期波到参考波的相位，并且基于对应于第二选定周期波和参考波之间的相位差的第二比较信号，将延迟单元的延迟值从第二延迟值恢复到第一延迟值 。
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9.发明公开公开(公告)号：US20230403000A1
公开(公告)日：2023-12-14
申请号：US18056676
申请日：2022-11-17
发明人： Shin-Hyun JEONG , Yongun Jeong , Suhwan Kim
IPC分类号： H03K5/01
CPC分类号： H03K5/01 , H03K2005/00019
摘要： A phase mixing circuit for a multi-phase signal includes a jitter cancellation circuit configured to mix phases of a signal input to a first node and a signal input to a second node to produce signals at a third node and a fourth node; and a delay adjustment circuit configured to adjust delays of the signals output from the third node and the fourth node to produce signals at a fifth node and a sixth node.
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公开(公告)号：US11133821B2
公开(公告)日：2021-09-28
申请号：US16863774
申请日：2020-04-30
发明人： Suhwan Kim , Minsung Kim , Jaehoon Jun
摘要： A delta-sigma modulator generates a bit stream signal from an analog signal by operating according to a modulation period including a sampling period and a filtering period and includes a digital-to-analog converter (DAC) configured to generate a charge signal according to one of a first reference voltage and a second reference voltage according to the bit stream signal during the sampling period and to output a signal generated according to the charge signal and the other of the first reference voltage and the second reference voltage; a loop filter configured to charge a sampling signal corresponding to the analog signal during the sampling period and to filter an output from the DAC and a signal generated according to the sampling signal during the filtering period; and a quantizer configured to generate the bit stream signal according to an output from the loop filter in the modulation period.
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