公开(公告)号：US20230380302A1

公开(公告)日：2023-11-23

申请号：US18357814

申请日：2023-07-24

申请人： SeeQC, Inc.

发明人： Daniel Yohannes ,  Denis Amparo ,  Oleksandr Chernyashevskyy ,  Oleg Mukhanov ,  Mario Renzullo ,  Andrei Talalaeskii ,  Igor Vernik ,  John Vivalda ,  Jason Walter

IPC分类号： H10N60/81 ,  H01L23/00 ,  H10N60/12 ,  H10N60/01

CPC分类号： H10N60/815 ,  H01L24/13 ,  H01L24/81 ,  H01L24/05 ,  H10N60/12 ,  H10N60/0912 ,  H01L2924/0495 ,  H01L2224/0401 ,  H01L2224/05179 ,  H01L2224/13083 ,  H01L2224/13109 ,  H01L2224/13147 ,  H01L2224/13166 ,  H01L2224/13179 ,  H01L2224/8109 ,  H01L2224/8112 ,  H01L2224/81203 ,  H01L2924/04941

摘要： A method for bonding two superconducting integrated circuits (“chips”), such that the bonds electrically interconnect the chips. A plurality of indium-coated metallic posts may be deposited on each chip. The indium bumps are aligned and compressed with moderate pressure at a temperature at which the indium is deformable but not molten, forming fully superconducting connections between the two chips when the indium is cooled down to the superconducting state. An anti-diffusion layer may be applied below the indium bumps to block reaction with underlying layers. The method is scalable to a large number of small contacts on the wafer scale, and may be used to manufacture a multi-chip module comprising a plurality of chips on a common carrier. Superconducting classical and quantum computers and superconducting sensor arrays may be packaged.

公开(公告)号：US11121302B2

公开(公告)日：2021-09-14

申请号：US16599985

申请日：2019-10-11

申请人： SeeQC, Inc.

发明人： Daniel Yohannes ,  Denis Amparo ,  Oleksandr Chernyashevskyy ,  Oleg Mukhanov ,  Mario Renzullo ,  Andrei Talalaeskii ,  Igor Vernik ,  John Vivalda ,  Jason Walter

IPC分类号： H01L29/06 ,  H01L29/08 ,  H01L31/0256 ,  H01L39/22 ,  H01L39/04 ,  H01L23/00 ,  H01L39/24

摘要： A method for bonding two superconducting integrated circuits (“chips”), such that the bonds electrically interconnect the chips. A plurality of indium-coated metallic posts may be deposited on each chip. The indium bumps are aligned and compressed with moderate pressure at a temperature at which the indium is deformable but not molten, forming fully superconducting connections between the two chips when the indium is cooled down to the superconducting state. An anti-diffusion layer may be applied below the indium bumps to block reaction with underlying layers. The method is scalable to a large number of small contacts on the wafer scale, and may be used to manufacture a multi-chip module comprising a plurality of chips on a common carrier. Superconducting classical and quantum computers and superconducting sensor arrays may be packaged.

公开(公告)号：US11711985B2

公开(公告)日：2023-07-25

申请号：US17472821

申请日：2021-09-13

申请人： SeeQC, Inc.

发明人： Daniel Yohannes ,  Denis Amparo ,  Oleksandr Chernyashevskyy ,  Oleg Mukhanov ,  Mario Renzullo ,  Andrei Talalaevskii ,  Igor Vernik ,  John Vivalda ,  Jason Walter

IPC分类号： H01L29/06 ,  H01L29/08 ,  H01L31/0256 ,  H01L39/22 ,  H10N60/81 ,  H01L23/00 ,  H10N60/12 ,  H10N60/01

CPC分类号： H10N60/815 ,  H01L24/05 ,  H01L24/13 ,  H01L24/81 ,  H10N60/0912 ,  H10N60/12 ,  H01L2224/0401 ,  H01L2224/05179 ,  H01L2224/13083 ,  H01L2224/13109 ,  H01L2224/13147 ,  H01L2224/13166 ,  H01L2224/13179 ,  H01L2224/8109 ,  H01L2224/8112 ,  H01L2224/81203 ,  H01L2924/0495 ,  H01L2924/04941

摘要： A method for bonding two superconducting integrated circuits (“chips”), such that the bonds electrically interconnect the chips. A plurality of indium-coated metallic posts may be deposited on each chip. The indium bumps are aligned and compressed with moderate pressure at a temperature at which the indium is deformable but not molten, forming fully superconducting connections between the two chips when the indium is cooled down to the superconducting state. An anti-diffusion layer may be applied below the indium bumps to block reaction with underlying layers. The method is scalable to a large number of small contacts on the wafer scale, and may be used to manufacture a multi-chip module comprising a plurality of chips on a common carrier. Superconducting classical and quantum computers and superconducting sensor arrays may be packaged.

公开(公告)号：US20210408355A1

公开(公告)日：2021-12-30

申请号：US17472821

申请日：2021-09-13

申请人： SeeQC, Inc.

发明人： Daniel Yohannes ,  Denis Amparo ,  Oleksandr Chernyashevskyy ,  Oleg Mukhanov ,  Mario Renzullo ,  Andrei Talalaeskii ,  Igor Vernik ,  John Vivalda ,  Jason Walter

IPC分类号： H01L39/04 ,  H01L23/00 ,  H01L39/22 ,  H01L39/24

摘要： A method for bonding two superconducting integrated circuits (“chips”), such that the bonds electrically interconnect the chips. A plurality of indium-coated metallic posts may be deposited on each chip. The indium bumps are aligned and compressed with moderate pressure at a temperature at which the indium is deformable but not molten, forming fully superconducting connections between the two chips when the indium is cooled down to the superconducting state. An anti-diffusion layer may be applied below the indium bumps to block reaction with underlying layers. The method is scalable to a large number of small contacts on the wafer scale, and may be used to manufacture a multi-chip module comprising a plurality of chips on a common carrier. Superconducting classical and quantum computers and superconducting sensor arrays may be packaged.