公开(公告)号：US20130242681A1

公开(公告)日：2013-09-19

申请号：US13890622

申请日：2013-05-09

Applicant: SanDisk 3D LLC

Inventor： Tyler J. Thorp ,  Roy E. Scheuerlein

IPC: G11C7/12

CPC classification number: G11C7/12 ,  G11C7/065 ,  G11C8/08 ,  G11C13/0004 ,  G11C13/0023 ,  G11C13/0061 ,  G11C13/0069

Abstract: A method is provided for programming a memory cell having a first terminal coupled to a word line and a second terminal coupled to a bit line. During a first predetermined time interval, the word line is switched from a first standby voltage to a first voltage, the bit line is switched from a second standby voltage to a predetermined voltage, and a voltage drop across the first and second terminals is a safe voltage that does not program the memory cell. During a second predetermined time interval, the word line is switched from the first voltage to a second voltage, and a voltage drop across the first and second terminals is a programming voltage that is sufficient to program the memory cell. Numerous other aspects are provided.

Abstract translation: 提供了一种用于对具有耦合到字线的第一端子和耦合到位线的第二端子的存储单元进行编程的方法。 在第一预定时间间隔期间，字线从第一备用电压切换到第一电压，位线从第二待机电压切换到预定电压，并且跨第一和第二端子的电压降是安全的 不对存储单元进行编程的电压。 在第二预定时间间隔期间，字线从第一电压切换到第二电压，并且跨越第一和第二端子的电压降是足以编程存储器单元的编程电压。 提供了许多其他方面。

公开(公告)号：US20140269129A1

公开(公告)日：2014-09-18

申请号：US14290888

申请日：2014-05-29

Applicant: SanDisk 3D LLC

Inventor： Tyler J. Thorp ,  Roy E. Scheuerlein

IPC: G11C7/12 ,  G11C8/08 ,  G11C7/06

CPC classification number: G11C7/12 ,  G11C7/065 ,  G11C8/08 ,  G11C13/0004 ,  G11C13/0023 ,  G11C13/0061 ,  G11C13/0069

Abstract: A method is provided for programming a memory cell having a first terminal coupled to a word line and a second terminal coupled to a bit line. During a first predetermined time interval, the word line is switched from a first standby voltage to a first voltage, the bit line is switched from a second standby voltage to a predetermined voltage, and a voltage drop across the first and second terminals is a safe voltage that does not program the memory cell. During a second predetermined time interval, the word line is switched from the first voltage to a second voltage, and a voltage drop across the first and second terminals is a programming voltage that is sufficient to program the memory cell. Numerous other aspects are provided.

Abstract translation: 提供了一种用于对具有耦合到字线的第一端子和耦合到位线的第二端子的存储单元进行编程的方法。 在第一预定时间间隔期间，字线从第一备用电压切换到第一电压，位线从第二待机电压切换到预定电压，并且跨第一和第二端子的电压降是安全的 不对存储单元进行编程的电压。 在第二预定时间间隔期间，字线从第一电压切换到第二电压，并且跨越第一和第二端子的电压降是足以编程存储器单元的编程电压。 提供了许多其他方面。

公开(公告)号：US09202539B2

公开(公告)日：2015-12-01

申请号：US14290888

申请日：2014-05-29

Applicant: SanDisk 3D LLC

Inventor： Tyler J. Thorp ,  Roy E. Scheuerlein

IPC: G11C7/12 ,  G11C8/08 ,  G11C13/00 ,  G11C7/06

CPC classification number: G11C7/12 ,  G11C7/065 ,  G11C8/08 ,  G11C13/0004 ,  G11C13/0023 ,  G11C13/0061 ,  G11C13/0069

Abstract: A method is provided for programming a memory cell having a first terminal coupled to a word line and a second terminal coupled to a bit line. During a first predetermined time interval, the word line is switched from a first standby voltage to a first voltage, the bit line is switched from a second standby voltage to a predetermined voltage, and a voltage drop across the first and second terminals is a safe voltage that does not program the memory cell. During a second predetermined time interval, the word line is switched from the first voltage to a second voltage, and a voltage drop across the first and second terminals is a programming voltage that is sufficient to program the memory cell. Numerous other aspects are provided.

Abstract translation: 提供了一种用于对具有耦合到字线的第一端子和耦合到位线的第二端子的存储单元进行编程的方法。 在第一预定时间间隔期间，字线从第一备用电压切换到第一电压，位线从第二待机电压切换到预定电压，并且跨第一和第二端子的电压降是安全的 不对存储单元进行编程的电压。 在第二预定时间间隔期间，字线从第一电压切换到第二电压，并且跨越第一和第二端子的电压降是足以编程存储器单元的编程电压。 提供了许多其他方面。

公开(公告)号：US08773898B2

公开(公告)日：2014-07-08

申请号：US13890622

申请日：2013-05-09

Applicant: SanDisk 3D LLC

Inventor： Tyler J. Thorp ,  Roy E. Scheuerlein

IPC: G11C13/00

CPC classification number: G11C7/12 ,  G11C7/065 ,  G11C8/08 ,  G11C13/0004 ,  G11C13/0023 ,  G11C13/0061 ,  G11C13/0069

Abstract: A method is provided for programming a memory cell having a first terminal coupled to a word line and a second terminal coupled to a bit line. During a first predetermined time interval, the word line is switched from a first standby voltage to a first voltage, the bit line is switched from a second standby voltage to a predetermined voltage, and a voltage drop across the first and second terminals is a safe voltage that does not program the memory cell. During a second predetermined time interval, the word line is switched from the first voltage to a second voltage, and a voltage drop across the first and second terminals is a programming voltage that is sufficient to program the memory cell. Numerous other aspects are provided.

Abstract translation: 提供了一种用于对具有耦合到字线的第一端子和耦合到位线的第二端子的存储单元进行编程的方法。 在第一预定时间间隔期间，字线从第一备用电压切换到第一电压，位线从第二待机电压切换到预定电压，并且跨第一和第二端子的电压降是安全的 不对存储单元进行编程的电压。 在第二预定时间间隔期间，字线从第一电压切换到第二电压，并且跨越第一和第二端子的电压降是足以编程存储器单元的编程电压。 提供了许多其他方面。

公开(公告)号：US08565015B2

公开(公告)日：2013-10-22

申请号：US13765394

申请日：2013-02-12

Applicant: SanDisk 3D LLC

Inventor： Tyler J. Thorp ,  Roy E. Scheuerlein

IPC: G11C11/00

CPC classification number: G11C13/0004 ,  G11C13/0069 ,  G11C2013/0076 ,  G11C2013/0092

Abstract: Methods of programming two terminal memory cells are provided. A method includes: (a) reading information of a memory page including first, second, and nth memory cells, the information including first, second, and nth program pulse tuning instructions; (b) creating a first program pulse in accordance with the first program pulse tuning instructions to program the first memory cell; (c) locking the first memory cell from further programming pulses; (d) creating a second program pulse in accordance with the second program pulse tuning instructions to program the second memory cell; (e) locking the second memory cell from further programming pulses; and (f) creating an nth program pulse in accordance with the nth program pulse tuning instructions to program the nth memory cell.

Abstract translation: 提供了编程两个终端存储单元的方法。 一种方法包括：（a）读取包括第一，第二和第n存储器单元的存储器页的信息，该信息包括第一，第二和第N编程脉冲调谐指令; （b）根据第一编程脉冲调谐指令产生第一编程脉冲以对第一存储单元进行编程; （c）锁定所述第一存储器单元以进一步编程脉冲; （d）根据第二编程脉冲调谐指令产生第二编程脉冲以编程第二存储单元; （e）锁定所述第二存储器单元以进一步编程脉冲; 和（f）根据第n个编程脉冲调谐指令产生第n个编程脉冲以对第n个存储单元进行编程。

公开(公告)号：US20130148421A1

公开(公告)日：2013-06-13

申请号：US13765394

申请日：2013-02-12

Applicant: SanDisk 3D LLC

Inventor： Tyler J. Thorp ,  Roy E. Scheuerlein

IPC: G11C13/00

CPC classification number: G11C13/0004 ,  G11C13/0069 ,  G11C2013/0076 ,  G11C2013/0092

Abstract: Methods of programming two terminal memory cells are provided. A method includes: (a) reading information of a memory page including first, second, and nth memory cells, the information including first, second, and nth program pulse tuning instructions; (b) creating a first program pulse in accordance with the first program pulse tuning instructions to program the first memory cell; (c) locking the first memory cell from further programming pulses; (d) creating a second program pulse in accordance with the second program pulse tuning instructions to program the second memory cell; (e) locking the second memory cell from further programming pulses; and (f) creating an nth program pulse in accordance with the nth program pulse tuning instructions to program the nth memory cell.

Abstract translation: 提供了编程两个终端存储单元的方法。 一种方法包括：（a）读取包括第一，第二和第n存储器单元的存储器页的信息，该信息包括第一，第二和第N编程脉冲调谐指令; （b）根据第一编程脉冲调谐指令产生第一编程脉冲以对第一存储单元进行编程; （c）锁定所述第一存储器单元以进一步编程脉冲; （d）根据第二编程脉冲调谐指令产生第二编程脉冲以编程第二存储单元; （e）锁定所述第二存储器单元以进一步编程脉冲; 和（f）根据第n个编程脉冲调谐指令产生第n个编程脉冲以对第n个存储单元进行编程。