公开(公告)号：US09524879B2

公开(公告)日：2016-12-20

申请号：US14669221

申请日：2015-03-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-Su Lee ,  Young-Wook Park ,  Hee-Sook Park ,  Dong-Bok Lee ,  Jong-Myeong Lee

IPC: H01L21/336 ,  H01L21/311 ,  H01L21/768 ,  H01L21/288 ,  H01L21/02 ,  H01L29/423 ,  H01L29/78

CPC classification number: H01L21/31111 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/288 ,  H01L21/76816 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/76855 ,  H01L21/76879 ,  H01L21/76895 ,  H01L27/10855 ,  H01L29/4236 ,  H01L29/78

Abstract: Semiconductor devices, and methods for fabricating a semiconductor device, include forming a contact hole penetrating an interlayer insulating layer and exposing a conductor defining a bottom surface of the contact hole, forming a sacrificial layer filling the contact hole, forming a first trench overlapping a part of the contact hole by removing at least a part of the sacrificial layer, forming a spacer filling the first trench, forming a second trench by removing a remainder of the sacrificial layer, and forming a metal electrode filling the contact hole and the second trench using electroless plating.

Abstract translation: 半导体器件以及半导体器件的制造方法包括：形成贯穿层间绝缘层的接触孔，露出限定接触孔的底面的导体，形成填充接触孔的牺牲层，形成与第一沟槽重叠的部分 通过去除所述牺牲层的至少一部分，形成填充所述第一沟槽的间隔物，通过去除所述牺牲层的剩余部分形成第二沟槽，以及使用以下方式形成填充所述接触孔和所述第二沟槽的金属电极： 无电镀。

公开(公告)号：US09716128B2

公开(公告)日：2017-07-25

申请号：US14659806

申请日：2015-03-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young-Kuk Kim ,  Young-Wook Park ,  Jeon-Il Lee ,  Hyun-Jung Lee

IPC: H01L27/22 ,  H01L29/66 ,  H01L27/108 ,  H01L29/423 ,  H01L43/08 ,  H01L43/12 ,  H01L29/45 ,  H01L21/768 ,  H01L21/285

CPC classification number: H01L27/228 ,  H01L21/28518 ,  H01L21/76897 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10876 ,  H01L27/10885 ,  H01L29/4236 ,  H01L29/456 ,  H01L29/665 ,  H01L29/66621 ,  H01L43/08 ,  H01L43/12

Abstract: Active patterns spaced apart from each other by an isolation layer are formed in a substrate. Gate structures extending in the isolation layer through the active patterns are formed. Each active pattern is divided into a central portion and a peripheral portion facing the central portion by the gate structures. A protrusion of at least one of active pattern is formed. The protrusion is exposed from a top surface of the isolation layer, and transformed into silicide such that a first silicide ohmic pad is formed at the central portion of the active pattern and a second silicide ohmic pad is formed at the peripheral portion of the active pattern. A conductive line structure electrically connected to the first silicide ohmic pad is formed. A conductive contact electrically connected to the second silicide ohmic pad is formed. A data storage unit electrically connected to the conductive contact is formed.