公开(公告)号：US10824507B2

公开(公告)日：2020-11-03

申请号：US16372047

申请日：2019-04-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myung Kyu Lee ,  Jun Jin Kong ,  Ki Jun Lee ,  Sung Hye Cho ,  Dae Hyun Kim ,  Yong Gyu Chu

IPC: G06F11/10 ,  H03M13/29 ,  G11C29/52

Abstract: Disclosed are a semiconductor memory device, a controller, and a memory system. The semiconductor memory device includes a memory cell array including a plurality of memory cells, and an error correcting code (ECC) decoder configured to receive first data and a parity output from selected memory cells of the memory cell array. The ECC decoder generates a syndrome based on the first data and the parity, generates a decoding status flag (DSF) indicating a type of an error of the first data by the syndrome, and outputs the second data and the DSF to an external device outside of the semiconductor memory device when a read operation of the semiconductor memory device is performed.

公开(公告)号：US11200117B2

公开(公告)日：2021-12-14

申请号：US17029912

申请日：2020-09-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myung Kyu Lee ,  Jun Jin Kong ,  Ki Jun Lee ,  Sung Hye Cho ,  Dae Hyun Kim ,  Yong Gyu Chu

IPC: G06F11/10 ,  H03M13/29 ,  G11C29/52

Abstract: Disclosed are a semiconductor memory device, a controller, a memory system, and an operation method thereof. The semiconductor memory device includes a memory cell array including a plurality of memory cells, and an error correcting code (ECC) decoder configured to receive first data and a parity output from selected memory cells of the memory cell array. The ECC decoder generates a syndrome based on the first data and the parity, generates a decoding status flag (DSF) indicating a type of an error of the first data by the syndrome, and outputs the second data and the DSF to an external device outside of the semiconductor memory device when a read operation of the semiconductor memory device is performed.

公开(公告)号：US20160293230A1

公开(公告)日：2016-10-06

申请号：US15187320

申请日：2016-06-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong Gyu Chu ,  Hyo Soon Kang ,  Seung Bum Ko ,  Sang Jae Rhee

IPC: G11C7/10 ,  H01L25/00 ,  H01L25/065 ,  G11C7/22

CPC classification number: G11C7/10 ,  G11C7/1012 ,  G11C7/1045 ,  G11C7/22 ,  G11C2207/105 ,  H01L21/50 ,  H01L23/48 ,  H01L23/50 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/06155 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/0651 ,  H01L2924/1434

Abstract: A semiconductor device includes a memory cell array, pad groups, a first option pad, a second option pad and a data input multiplexer block configured to transmit data, input through all or part of the pad groups, to the memory cell array based on whether the first option pad and a ground are connected to each other, wherein the data input multiplexer block is configured to select first pad groups among the pad groups or second pad groups among the pad groups as the part of the pad groups based on whether the second option pad and the ground are connected to each other.

公开(公告)号：US10403331B2

公开(公告)日：2019-09-03

申请号：US15187320

申请日：2016-06-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong Gyu Chu ,  Hyo Soon Kang ,  Seung Bum Ko ,  Sang Jae Rhee

IPC: G11C7/10 ,  H01L21/50 ,  H01L23/48 ,  H01L23/50 ,  G11C7/22 ,  H01L25/065 ,  H01L25/00

Abstract: A semiconductor device includes a memory cell array, pad groups, a first option pad, a second option pad and a data input multiplexer block configured to transmit data, input through all or part of the pad groups, to the memory cell array based on whether the first option pad and a ground are connected to each other, wherein the data input multiplexer block is configured to select first pad groups among the pad groups or second pad groups among the pad groups as the part of the pad groups based on whether the second option pad and the ground are connected to each other.

公开(公告)号：US09390772B2

公开(公告)日：2016-07-12

申请号：US13833740

申请日：2013-03-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong Gyu Chu ,  Hyo Soon Kang ,  Seung Bum Ko ,  Sang Jae Rhee

IPC: G11C7/00 ,  G11C7/10 ,  H01L21/50 ,  H01L23/48 ,  H01L23/50

CPC classification number: G11C7/10 ,  G11C7/1012 ,  G11C7/1045 ,  G11C7/22 ,  G11C2207/105 ,  H01L21/50 ,  H01L23/48 ,  H01L23/50 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/06155 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/0651 ,  H01L2924/1434

Abstract: A semiconductor device includes a memory cell array, pad groups, a first option pad, a second option pad and a data input multiplexer block configured to transmit data, input through all or part of the pad groups, to the memory cell array based on whether the first option pad and a ground are connected to each other, wherein the data input multiplexer block is configured to select first pad groups among the pad groups or second pad groups among the pad groups as the part of the pad groups based on whether the second option pad and the ground are connected to each other.

Abstract translation: 半导体器件包括存储单元阵列，焊盘组，第一可选焊盘，第二可选焊盘和数据输入多路复用器块，其被配置为基于是否通过全部或部分焊盘组输入数据到存储器单元阵列 所述第一可选焊盘和接地彼此连接，其中所述数据输入多路复用器块被配置为基于所述焊盘组中的所述第二焊盘组或所述焊盘组中的第二焊盘组作为所述焊盘组的一部分来选择所述焊盘组中的第一焊盘组， 选项板和地面相互连接。