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    Display driving circuit and a display device having the same
    1.
    发明授权
    Display driving circuit and a display device having the same 有权
    显示驱动电路及具有该驱动电路的显示装置

    公开(公告)号：US09552791B2

    公开(公告)日：2017-01-24

    申请号：US14550312

    申请日：2014-11-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jong-Kon Bae ,  Won-Sik Kang ,  Yang-Hyo Kim ,  Jae-Hyuck Woo

    IPC: G09G5/00 ,  G09G3/20

    CPC classification number: G09G5/001 ,  G09G3/20 ,  G09G5/006 ,  G09G2310/08 ,  G09G2330/021 ,  G09G2330/023 ,  G09G2330/06 ,  G09G2370/08

    Abstract: A display driving circuit includes first through (2*n)-th buffers, a buffer controller, first through n-th image processing units, and a source driver. The buffer controller circularly selects one of the first through (2*n)-th buffers in an order from the first buffer to the (2*n)-th buffer at each of a plurality of first time intervals, and stores pixel data received during the first time interval in the selected buffer. Each of the first through n-th image processing units is coupled to two corresponding buffers among the first through (2*n)-th buffers, and processes the pixel data, which are stored in at least one of their corresponding buffers, during n of the first time intervals to generate processed data when the pixel data are stored in the corresponding buffer during the first time interval. The source driver generates analog signals based on the processed data.

    Abstract translation: 显示驱动电路包括第一到第（2×n）个缓冲器，缓冲器控制器，第一至第n图像处理单元和源极驱动器。 缓冲器控制器在多个第一时间间隔中的每一个处以从第一缓冲器到第（2×n）个缓冲器的顺序循环选择第一至第（2×n）个缓冲器中的一个，并存储接收的像素数据 在所选缓冲区的第一个时间间隔内。 第一至第n图像处理单元中的每一个耦合到第一至第（2×n）个缓冲器中的两个对应的缓冲器，并且处理存储在其相应缓冲器中的至少一个中的像素数据，在n 的第一时间间隔以在第一时间间隔期间将像素数据存储在相应的缓冲器中时产生处理的数据。 源驱动器基于处理的数据生成模拟信号。

    Display driving circuit and display device including the same
    2.
    发明授权
    Display driving circuit and display device including the same 有权

    公开(公告)号：US10095459B2

    公开(公告)日：2018-10-09

    申请号：US14733357

    申请日：2015-06-08

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Yang-Hyo Kim ,  Do-Kyung Kim

    IPC: G06F3/14 ,  G09G3/20 ,  G09G3/3225 ,  G09G5/00 ,  G09G5/395 ,  G06F3/044

    Abstract: A display driving circuit includes a command sync controller, a command pre-buffer and a command register. The command sync controller generates a first sync signal based on an external signal. The command pre-buffer stores a first command. The command register stores the first command provided from the command pre-buffer. The first sync signal is provided both to the command pre-buffer and to an external device of the display driving circuit. The command pre-buffer provides, in response to the first sync signal, the first command stored in the command pre-buffer to the command register.

    Display driving circuit and display device including the same
    4.
    发明授权
    Display driving circuit and display device including the same 有权

    公开(公告)号：US10068555B2

    公开(公告)日：2018-09-04

    申请号：US15158804

    申请日：2016-05-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yang-Hyo Kim ,  Chul-Ho Kim ,  Sun-Young Kim ,  Hak-Song Kim ,  Sang-Hoon Lim

    IPC: G09G5/36 ,  G09G5/399 ,  G09G5/00 ,  G09G5/12

    Abstract: An display driving circuit including a buffer write controller transmitting a different image frame to a first buffer or a second buffer, a buffer scan controller scanning an image frame stored in the first buffer or the second buffer on the basis of a predetermined cycle, a write signal detector controlling the buffer write controller such that a second image frame is transmitted to the second buffer after a first image frame is transmitted to the first buffer, and a scan buffer switching controller receiving an EOF (End of Frame) command indicating the completion of transmission of the first image frame to the first buffer and controlling the buffer scan controller such that the first image frame stored in the first buffer is scanned after the image frame previously stored in the second buffer is scanned.

    Display devices and display systems having the same
    5.
    发明授权
    Display devices and display systems having the same 有权

    公开(公告)号：US10269288B2

    公开(公告)日：2019-04-23

    申请号：US15362931

    申请日：2016-11-29

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jeong-Pyo Kim ,  Jin-Hong Hwang ,  Ki-Ho Kong ,  Yang-Hyo Kim ,  Eui-Hyuk Jeong

    IPC: G09G3/20

    Abstract: A display device includes an image processor configured to invert a switch signal at a change of frames, and output, based on the switch signal, one among odd column pixel data and even column pixel data among first through (2M)-th column pixel data included in a frame data, as a half frame data, a display panel including first through M-th odd column pixels coupled to first through M-th odd column lines, respectively, and first through M-th even column pixels coupled to first through M-th even column lines, respectively, and a driving circuit including first through M-th driving units including a K-th driving unit configured to drive, based on the switch signal, one among K-th odd column pixels through a K-th odd column line and K-th even column pixels through a K-th even column line, using a K-th column pixel data included in the half frame data.

    DISPLAY DRIVING CIRCUIT AND A DISPLAY DEVICE HAVING THE SAME
    7.
    发明申请
    DISPLAY DRIVING CIRCUIT AND A DISPLAY DEVICE HAVING THE SAME 有权
    显示驱动电路和具有该显示驱动电路的显示器件

    公开(公告)号：US20150262543A1

    公开(公告)日：2015-09-17

    申请号：US14550312

    申请日：2014-11-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jong-Kon Bae ,  Won-Sik Kang ,  Yang-Hyo Kim ,  Jae-Hyuck Woo

    IPC: G09G5/00

    CPC classification number: G09G5/001 ,  G09G3/20 ,  G09G5/006 ,  G09G2310/08 ,  G09G2330/021 ,  G09G2330/023 ,  G09G2330/06 ,  G09G2370/08

    Abstract: A display driving circuit includes first through (2*n)-th buffers, a buffer controller, first through n-th image processing units, and a source driver. The buffer controller circularly selects one of the first through (2*n)-th buffers in an order from the first buffer to the (2*n)-th buffer at each of a plurality of first time intervals, and stores pixel data received during the first time interval in the selected buffer. Each of the first through n-th image processing units is coupled to two corresponding buffers among the first through (2*n)-th buffers, and processes the pixel data, which are stored in at least one of their corresponding buffers, during n of the first time intervals to generate processed data when the pixel data are stored in the corresponding buffer during the first time interval. The source driver generates analog signals based on the processed data.

    Abstract translation: 显示驱动电路包括第一到第（2×n）个缓冲器，缓冲器控制器，第一至第n图像处理单元和源极驱动器。 缓冲器控制器在多个第一时间间隔中的每一个处以从第一缓冲器到第（2×n）个缓冲器的顺序循环选择第一至第（2×n）个缓冲器中的一个，并存储接收到的像素数据 在所选缓冲区的第一个时间间隔内。 第一至第n图像处理单元中的每一个耦合到第一至第（2×n）个缓冲器中的两个对应的缓冲器，并且处理存储在其相应缓冲器中的至少一个中的像素数据，在n 的第一时间间隔以在第一时间间隔期间将像素数据存储在相应的缓冲器中时产生处理的数据。 源驱动器基于处理的数据生成模拟信号。

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