公开(公告)号：US20180130697A1

公开(公告)日：2018-05-10

申请号：US15616334

申请日：2017-06-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Shin JANG ,  Woo-Kyung YOU ,  Kyu-Hee HAN ,  Jong-Min BAEK ,  Viet Ha NGUYEN ,  Byung-Hee KIM

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532

CPC classification number: H01L21/7682 ,  H01L21/76816 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/5329 ,  H01L23/53295

Abstract: A semiconductor device includes a first insulating interlayer on a first region of a substrate and a second insulating interlayer on a second region of the substrate, a plurality of first wiring structures on the first insulating interlayer, the first wiring structures being spaced apart from each other, a plurality of second wiring structures filling a plurality of trenches on the second insulating interlayer, respectively, an insulation capping structure selectively on a surface of the first insulating interlayer between the first wiring structures and on a sidewall and an upper surface of each of the first wiring structures, the insulation capping structure including an insulating material, a third insulating interlayer on the first and second wiring structures, and an air gap among the first wiring structures under the third insulating interlayer.

公开(公告)号：US20160211211A1

公开(公告)日：2016-07-21

申请号：US14984085

申请日：2015-12-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tae-Jin YIM ,  Woo-Kyung YOU ,  Jong-Min BAEK ,  Sang-Hoon AHN ,  Thomas OSZINDA ,  Kee-Young JUN

IPC: H01L23/528 ,  H01L23/532 ,  H01L23/522

CPC classification number: H01L23/53295 ,  H01L21/76814 ,  H01L21/7682 ,  H01L21/76826 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76849 ,  H01L23/5222 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device is provided. The semiconductor device includes a first porous interlayer insulating film having a low dielectric constant and including a first region and a second region, a second interlayer insulating film formed on the first interlayer insulating film in the first region, a plurality of first conductive patterns formed in the second interlayer insulating film such that the plurality of first conductive patterns are spaced apart from each other, at least one second conductive pattern formed in the first interlayer insulating film in the second region and air gaps disposed at lateral sides of the plurality of first conductive patterns.

Abstract translation: 提供半导体器件。 半导体器件包括具有低介电常数并且包括第一区域和第二区域的第一多孔层间绝缘膜，形成在第一区域中的第一层间绝缘膜上的第二层间绝缘膜，形成在第一区域中的多个第一导电图案 所述第二层间绝缘膜使得所述多个第一导电图案彼此间隔开，形成在所述第二区域中的所述第一层间绝缘膜中的至少一个第二导电图案和设置在所述多个第一导电性 模式。

公开(公告)号：US20190139813A1

公开(公告)日：2019-05-09

申请号：US16242483

申请日：2019-01-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Shin JANG ,  Woo-Kyung YOU ,  Kyu-Hee HAN ,  Jong-Min BAEK ,  Viet Ha NGUYEN ,  Byung-Hee KIM

IPC: H01L21/768 ,  H01L23/528 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/7682 ,  H01L21/76816 ,  H01L21/76826 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/5329 ,  H01L23/53295

Abstract: A semiconductor device includes a first insulating interlayer on a first region of a substrate and a second insulating interlayer on a second region of the substrate, a plurality of first wiring structures on the first insulating interlayer, the first wiring structures being spaced apart from each other, a plurality of second wiring structures filling a plurality of trenches on the second insulating interlayer, respectively, an insulation capping structure selectively on a surface of the first insulating interlayer between the first wiring structures and on a sidewall and an upper surface of each of the first wiring structures, the insulation capping structure including an insulating material, a third insulating interlayer on the first and second wiring structures, and an air gap among the first wiring structures under the third insulating interlayer.