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公开(公告)号:US20230292521A1
公开(公告)日:2023-09-14
申请号:US18153763
申请日:2023-01-12
发明人: Woo Yong JEON , Eun-Ji Kim , Ji Young Kim , Moo Rym Choi
IPC分类号: H10B43/40 , H10B43/10 , H10B43/27 , H10B43/35 , H01L23/522 , H01L23/528 , H10B41/10 , H10B41/27 , H10B41/35 , H10B41/40
CPC分类号: H10B43/40 , H10B43/10 , H10B43/27 , H10B43/35 , H01L23/5226 , H01L23/5283 , H10B41/10 , H10B41/27 , H10B41/35 , H10B41/40
摘要: A semiconductor memory device includes a peripheral circuit structure including a peripheral circuit and a first bonding pad, the first bonding pad connected to the peripheral circuit, a cell structure on the peripheral circuit structure, the cell structure including a second bonding pad bonded to the first bonding pad, and a pad structure on the cell structure. The cell structure includes a cell substrate having a first face, a second face opposite to the first face, a first contact plug extending through the cell substrate and connected to an electrode layer, and a second contact plug extending through the cell substrate and connected to the cell substrate. Each of the first contact plug and the second contact plug is connected to the pad structure, and a bypass via is in contact with the pad structure on the second face.