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公开(公告)号:US20200075545A1
公开(公告)日:2020-03-05
申请号:US16382376
申请日:2019-04-12
发明人: Won-keun KIM , Kyung-suk Oh , Ji-han Ko , Kil-soo Kim , Yeong-seok Kim , Joung-phil Lee , Hwa-il Jin , Su-jung Hyung
IPC分类号: H01L25/065 , H01L23/31 , H01L23/552 , H01L23/367 , H01L25/00 , H01L21/56
摘要: A semiconductor package may include a first semiconductor chip on and electrically connected to a wiring substrate, an intermediate layer on the first semiconductor chip and covering an entire surface of the first semiconductor chip, a second semiconductor chip on the intermediate layer and electrically connected to the wiring substrate, a mold layer on the wiring substrate and covering the first semiconductor chip and the second semiconductor chip, the mold layer including one or more inner surfaces defining a mold via hole that exposes a portion of a surface of the intermediate layer, an electromagnetic shielding layer on the one or more inner surfaces of the mold layer and further on one or more outer surfaces of the mold layer, and a thermal discharge layer on the electromagnetic shielding layer in the mold via hole, such that the thermal discharge layer fills the mold via hole.
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公开(公告)号:US20140138799A1
公开(公告)日:2014-05-22
申请号:US14062201
申请日:2013-10-24
发明人: Won-keun KIM , Sang-Wook PARK
IPC分类号: H01L23/538
CPC分类号: H01L21/561 , H01L21/76898 , H01L23/525 , H01L23/5329 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/06181 , H01L2224/16145 , H01L2224/16146 , H01L2224/1703 , H01L2224/17181 , H01L2224/32145 , H01L2224/73204 , H01L2224/92125 , H01L2224/94 , H01L2224/97 , H01L2225/06513 , H01L2225/06541 , H01L2225/06565 , H01L2225/06568 , H01L2924/00014 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/1461 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/00012 , H01L2924/00 , H01L2224/05552 , H01L2224/81 , H01L2224/83
摘要: Semiconductor packages capable of reducing a total height thereof and methods of manufacturing the semiconductor package are provided. The semiconductor package includes a semiconductor substrate having first and second surfaces opposite to each other, a semiconductor device formed on the first surface of the semiconductor substrate, pads formed on the first surface of the semiconductor substrate and electrically connected to the semiconductor device, and at least one printed circuit layer including a resin layer, via electrodes penetrating through the resin layer, and line layers formed on the first resin layer and connected to the via electrodes and attached onto the first surface of the semiconductor substrate. The via electrodes and the line layers are formed of the same type of material, and the via electrodes are electrically connected to the pads.
摘要翻译: 提供能够降低其总高度的半导体封装以及制造半导体封装的方法。 半导体封装包括具有彼此相对的第一和第二表面的半导体衬底,形成在半导体衬底的第一表面上的半导体器件,形成在半导体衬底的第一表面上并与半导体器件电连接的焊盘 至少一个包括树脂层的印刷电路层,穿过树脂层的电极,以及形成在第一树脂层上并连接到通孔电极并连接到半导体衬底的第一表面上的线层。 通孔电极和线层由相同类型的材料形成,并且通孔电极电连接到焊盘。
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公开(公告)号:US20180350779A1
公开(公告)日:2018-12-06
申请号:US16050341
申请日:2018-07-31
发明人: Yong-won CHOI , Won-keun KIM , Myung-sung KANG , Gwang-sun SEO
IPC分类号: H01L25/065
CPC分类号: H01L25/0657 , H01L21/563 , H01L2224/16145 , H01L2224/73204 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06586 , H01L2225/06589
摘要: A semiconductor package includes a first semiconductor chip including a first through-silicon via (TSV), a second semiconductor chip stacked on the first semiconductor chip and including a second TSV, and a non-conductive film formed between the first semiconductor chip and the second semiconductor chip. The non-conductive film includes two layers having different viscosities.
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公开(公告)号:US20180012866A1
公开(公告)日:2018-01-11
申请号:US15435286
申请日:2017-02-16
发明人: Yong-won CHOI , Won-keun KIM , Myung-sung KANG , Gwang-sun SEO
IPC分类号: H01L25/065
CPC分类号: H01L25/0657 , H01L21/563 , H01L2224/16145 , H01L2224/73204 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06586 , H01L2225/06589
摘要: A semiconductor package includes a first semiconductor chip including a first through-silicon via (TSV), a second semiconductor chip stacked on the first semiconductor chip and including a second TSV, and a non-conductive film formed between the first semiconductor chip and the second semiconductor chip. The non-conductive film includes two layers having different viscosities.
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