公开(公告)号：US20200075545A1

公开(公告)日：2020-03-05

申请号：US16382376

申请日：2019-04-12

申请人： Samsung Electronics Co., Ltd.

发明人： Won-keun KIM ,  Kyung-suk Oh ,  Ji-han Ko ,  Kil-soo Kim ,  Yeong-seok Kim ,  Joung-phil Lee ,  Hwa-il Jin ,  Su-jung Hyung

IPC分类号： H01L25/065 ,  H01L23/31 ,  H01L23/552 ,  H01L23/367 ,  H01L25/00 ,  H01L21/56

摘要： A semiconductor package may include a first semiconductor chip on and electrically connected to a wiring substrate, an intermediate layer on the first semiconductor chip and covering an entire surface of the first semiconductor chip, a second semiconductor chip on the intermediate layer and electrically connected to the wiring substrate, a mold layer on the wiring substrate and covering the first semiconductor chip and the second semiconductor chip, the mold layer including one or more inner surfaces defining a mold via hole that exposes a portion of a surface of the intermediate layer, an electromagnetic shielding layer on the one or more inner surfaces of the mold layer and further on one or more outer surfaces of the mold layer, and a thermal discharge layer on the electromagnetic shielding layer in the mold via hole, such that the thermal discharge layer fills the mold via hole.

公开(公告)号：US11205637B2

公开(公告)日：2021-12-21

申请号：US17009886

申请日：2020-09-02

申请人： Samsung Electronics Co., Ltd.

发明人： Won-keun Kim ,  Kyung-suk Oh ,  Ji-han Ko ,  Kil-soo Kim ,  Yeong-seok Kim ,  Joung-phil Lee ,  Hwa-il Jin ,  Su-jung Hyung

IPC分类号： H01L25/065 ,  H01L21/56 ,  H01L23/31 ,  H01L23/367 ,  H01L23/552 ,  H01L25/00

摘要： A semiconductor package may include a first semiconductor chip on and electrically connected to a wiring substrate, an intermediate layer on the first semiconductor chip and covering an entire surface of the first semiconductor chip, a second semiconductor chip on the intermediate layer and electrically connected to the wiring substrate, a mold layer on the wiring substrate and covering the first semiconductor chip and the second semiconductor chip, the mold layer including one or more inner surfaces defining a mold via hole that exposes a portion of a surface of the intermediate layer, an electromagnetic shielding layer on the one or more inner surfaces of the mold layer and further on one or more outer surfaces of the mold layer, and a thermal discharge layer on the electromagnetic shielding layer in the mold via hole, such that the thermal discharge layer fills the mold via hole.

公开(公告)号：US10797021B2

公开(公告)日：2020-10-06

申请号：US16382376

申请日：2019-04-12

申请人： Samsung Electronics Co., Ltd.

发明人： Won-keun Kim ,  Kyung-suk Oh ,  Ji-han Ko ,  Kil-soo Kim ,  Yeong-seok Kim ,  Joung-phil Lee ,  Hwa-il Jin ,  Su-jung Hyung

IPC分类号： H01L25/065 ,  H01L21/56 ,  H01L23/31 ,  H01L23/367 ,  H01L23/552 ,  H01L25/00

摘要： A semiconductor package may include a first semiconductor chip on and electrically connected to a wiring substrate, an intermediate layer on the first semiconductor chip and covering an entire surface of the first semiconductor chip, a second semiconductor chip on the intermediate layer and electrically connected to the wiring substrate, a mold layer on the wiring substrate and covering the first semiconductor chip and the second semiconductor chip, the mold layer including one or more inner surfaces defining a mold via hole that exposes a portion of a surface of the intermediate layer, an electromagnetic shielding layer on the one or more inner surfaces of the mold layer and further on one or more outer surfaces of the mold layer, and a thermal discharge layer on the electromagnetic shielding layer in the mold via hole, such that the thermal discharge layer fills the mold via hole.