公开(公告)号：US20160172291A1

公开(公告)日：2016-06-16

申请号：US14957053

申请日：2015-12-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tongsuk KIM ,  HyunJong MOON ,  Tai-Hyun EUM ,  Heeseok LEE ,  Keung Beum KIM ,  Yonghoon KIM ,  Yoonha JUNG ,  Seung-Yong CHA

IPC: H01L23/498 ,  H01L23/34

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L23/49811 ,  H01L23/49894 ,  H01L24/00 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor package may include a package substrate with a top surface and a bottom surface opposite to the top surface, the top surface of the package substrate configured to have a semiconductor chip mounted thereon, a power block and a ground block in the package substrate, the power block configured as a power pathway penetrating the package substrate, and the ground block configured as a ground pathway penetrating the package substrate, first vias extended from the power block and the ground block, and the first vias electrically connected to the semiconductor chip, second vias extended from the power block and the ground block toward the bottom surface of the package substrate, and block vias to penetrate the power block and the ground block, the block vias electrically connected to the semiconductor chip and electrically separated from the power block and the ground block.

Abstract translation: 半导体封装可以包括具有顶表面和与顶表面相对的底表面的封装衬底，封装衬底的顶表面被配置为具有安装在其上的半导体芯片，封装衬底中的功率块和接地块， 所述功率块被配置为穿过所述封装衬底的电力通路，并且所述接地块被配置为穿过所述封装衬底的接地路径，从所述功率块和所述接地块延伸的第一通孔以及电连接到所述半导体芯片的所述第一通孔， 第二通孔从功率块和接地块延伸到封装衬底的底表面，并且阻挡通孔以穿透功率块和接地块，块通孔电连接到半导体芯片并与功率块电分离， 地块。

公开(公告)号：US20140239477A1

公开(公告)日：2014-08-28

申请号：US14272681

申请日：2014-05-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Tongsuk KIM ,  Jangwoo LEE ,  Heeseok LEE ,  Kyoungsei CHOI

IPC: H01L23/06 ,  H01L23/34 ,  H01L23/552

CPC classification number: H01L23/06 ,  H01L21/563 ,  H01L23/10 ,  H01L23/3128 ,  H01L23/34 ,  H01L23/36 ,  H01L23/42 ,  H01L23/49816 ,  H01L23/552 ,  H01L23/562 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06568 ,  H01L2924/15311 ,  H01L2924/16172 ,  H01L2924/16251 ,  H01L2924/00

Abstract: A semiconductor package including a package substrate having a chip mounting region and a peripheral region and including a ground layer formed in the peripheral region, first solder balls on the package substrate in the chip mounting region, second solder balls on the ground layer, at least one semiconductor chip stacked on the package substrate in the chip mounting region, and a package cap covering the semiconductor chip and contacting the package substrate in the peripheral region may be provided. The package cap is electrically connected to the second solder balls. Methods of fabricating the semiconductor package are also provided.

Abstract translation: 一种半导体封装，包括具有芯片安装区域和周边区域的封装基板，并且包括形成在周边区域中的接地层，在芯片安装区域中的封装基板上的第一焊球，接地层上的第二焊球，至少 可以提供在芯片安装区域中堆叠在封装基板上的一个半导体芯片，以及覆盖半导体芯片并且在周边区域中与封装基板接触的封装帽。 封装帽电连接到第二焊球。 还提供了制造半导体封装的方法。