知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

8 records (took 0.018 seconds)

    Method of forming semiconductor device having self-aligned plug
    1.
    发明授权
    Method of forming semiconductor device having self-aligned plug 有权
    形成具有自对准插头的半导体器件的方法

    公开(公告)号：US08790976B2

    公开(公告)日：2014-07-29

    申请号：US13942149

    申请日：2013-07-15

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Gyu-Hwan Oh ,  Sung-Lae Cho ,  Byoung-Jae Bae ,  Ik-Soo Kim ,  Dong-Hyun Im ,  Doo-Hwan Park ,  Kyoung-Ha Eom ,  Sung-Un Kwon ,  Chul-Ho Shin ,  Sang-Sup Jeong

    IPC: H01L21/336

    CPC classification number: H01L45/1683 ,  H01L27/2463 ,  H01L45/06

    Abstract: A conductive pattern on a substrate is formed. An insulating layer having an opening exposing the conductive pattern is formed. A bottom electrode is formed on the conductive pattern and a first sidewall of the opening. A spacer is formed on the bottom electrode and a second sidewall of the opening. The spacer and the bottom electrode are formed to be lower than a top surface of the insulating layer. A data storage plug is formed on the bottom electrode and the spacer. The data storage plug has a first sidewall aligned with a sidewall of the bottom electrode and a second sidewall aligned with a sidewall of the spacer. A bit line is formed on the data storage plug.

    Abstract translation: 形成基板上的导电图案。 形成具有露出导电图案的开口的绝缘层。 底部电极形成在导电图案和开口的第一侧壁上。 在底部电极和开口的第二侧壁上形成间隔物。 间隔件和底部电极形成为低于绝缘层的顶表面。 数据存储插头形成在底部电极和间隔件上。 数据存储插头具有与底部电极的侧壁对准的第一侧壁和与间隔件的侧壁对准的第二侧壁。 在数据存储插头上形成位线。

    Method of Forming Semiconductor Device Having Self-Aligned Plug
    6.
    发明申请
    Method of Forming Semiconductor Device Having Self-Aligned Plug 有权
    形成具有自对准插头的半导体器件的方法

    公开(公告)号：US20130302966A1

    公开(公告)日：2013-11-14

    申请号：US13942149

    申请日：2013-07-15

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Gyu-Hwan Oh ,  Sung-Lae Cho ,  Byoung-Jae Bae ,  Ik-Soo Kim ,  Dong-Hyun Im ,  Doo-Hwan Park ,  Kyoung-Ha Eom ,  Sung-Un Kwon ,  Chul-Ho Shin ,  Sang-Sup Jeong

    IPC: H01L45/00

    CPC classification number: H01L45/1683 ,  H01L27/2463 ,  H01L45/06

    Abstract: A conductive pattern on a substrate is formed. An insulating layer having an opening exposing the conductive pattern is formed. A bottom electrode is formed on the conductive pattern and a first sidewall of the opening. A spacer is formed on the bottom electrode and a second sidewall of the opening. The spacer and the bottom electrode are formed to be lower than a top surface of the insulating layer. A data storage plug is formed on the bottom electrode and the spacer. The data storage plug has a first sidewall aligned with a sidewall of the bottom electrode and a second sidewall aligned with a sidewall of the spacer. A bit line is formed on the data storage plug.

    Abstract translation: 形成基板上的导电图案。 形成具有露出导电图案的开口的绝缘层。 底部电极形成在导电图案和开口的第一侧壁上。 在底部电极和开口的第二侧壁上形成间隔物。 间隔件和底部电极形成为低于绝缘层的顶表面。 数据存储插头形成在底部电极和间隔件上。 数据存储插头具有与底部电极的侧壁对准的第一侧壁和与间隔件的侧壁对准的第二侧壁。 在数据存储插头上形成位线。

    Semiconductor devices
    7.
    发明授权
    Semiconductor devices 有权

    公开(公告)号：US10700074B2

    公开(公告)日：2020-06-30

    申请号：US16782213

    申请日：2020-02-05

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jun-Kyum Kim ,  Jung-Woo Seo ,  Sung-Un Kwon

    IPC: H01L23/52 ,  H01L27/108 ,  H01L21/768

    Abstract: A semiconductor device can include a plurality of landing pads arranged according to a layout on a substrate, wherein a cross-sectional shape of each of the landing pads has a diamond shape so that opposing interior angles of the diamond shape are equal to one another and adjacent interior angles of the diamond shape are unequal to one another.

Patent Agency Ranking