公开(公告)号：US20150060862A1

公开(公告)日：2015-03-05

申请号：US14263119

申请日：2014-04-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Han-jin LIM ,  Kong-soo LEE ,  Seok-woo NAM ,  Dong-chan KIM ,  Soo-jin HONG

IPC: H01L27/11 ,  H01L27/092

CPC classification number: H01L27/092 ,  G11C7/065 ,  G11C11/4091 ,  H01L27/0688 ,  H01L27/1108

Abstract: A semiconductor device includes a substrate; a first inverter disposed on the substrate and receiving a voltage from any one of a bit line and a complementary bit line; a semiconductor layer disposed on the first inverter; and first and third switch devices disposed on the semiconductor layer and adjusting a threshold voltage of the first inverter to a voltage level of any one of the bit line and the complementary bit line.

Abstract translation: 半导体器件包括衬底; 第一反相器，设置在所述基板上并接收来自位线和互补位线中的任何一个的电压; 设置在所述第一反相器上的半导体层; 以及设置在半导体层上的第一和第三开关器件，并且将第一反相器的阈值电压调整到位线和互补位线中的任一个的电压电平。

公开(公告)号：US20180158828A1

公开(公告)日：2018-06-07

申请号：US15673843

申请日：2017-08-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-uk HAN ,  Soo-jin HONG ,  Wook-yeol YI

IPC: H01L27/108 ,  H01L29/06 ,  H01L21/02 ,  H01L29/423 ,  H01L49/02 ,  H01L21/768 ,  H01L21/762

CPC classification number: H01L27/10823 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02233 ,  H01L21/02255 ,  H01L21/28123 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/76224 ,  H01L21/76229 ,  H01L21/76804 ,  H01L21/76877 ,  H01L27/10814 ,  H01L27/10876 ,  H01L27/10885 ,  H01L27/10888 ,  H01L27/10897 ,  H01L28/90 ,  H01L29/0649 ,  H01L29/0684 ,  H01L29/4236

Abstract: A semiconductor device may include a semiconductor substrate, a trench isolation layer on the semiconductor substrate and configured to define an active region, and a multi-liner layer on an inside wall of a trench including the trench isolation layer. The multi-liner layer may include a first liner layer on the inside wall of the trench, a second liner layer on the first liner layer, and a third liner layer on the second liner layer.

公开(公告)号：US20240321910A1

公开(公告)日：2024-09-26

申请号：US18731895

申请日：2024-06-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kook-tae KIM ,  Jin-gyun KIM ,  Soo-jin HONG

IPC: H01L27/146 ,  H04N25/40

CPC classification number: H01L27/14605 ,  H04N25/40

Abstract: An image sensor including a semiconductor substrate having a first surface and a second surface; and a pixel isolation film extending from the first surface of the semiconductor substrate into the semiconductor substrate and defining active pixels in the semiconductor substrate, wherein the pixel isolation film includes a buried conductive layer including polysilicon containing a fining element at a first concentration; and an insulating liner between the buried conductive layer and the semiconductor substrate, and wherein the fining element includes oxygen, carbon, or fluorine.

公开(公告)号：US20230275104A1

公开(公告)日：2023-08-31

申请号：US18144969

申请日：2023-05-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kook-tae KIM ,  Jin-gyun KIM ,  Soo-jin HONG

IPC: H01L27/146 ,  H04N25/40

CPC classification number: H01L27/14605 ,  H04N25/40

Abstract: An image sensor including a semiconductor substrate having a first surface and a second surface; and a pixel isolation film extending from the first surface of the semiconductor substrate into the semiconductor substrate and defining active pixels in the semiconductor substrate, wherein the pixel isolation film includes a buried conductive layer including polysilicon containing a fining element at a first concentration; and an insulating liner between the buried conductive layer and the semiconductor substrate, and wherein the fining element includes oxygen, carbon, or fluorine.

公开(公告)号：US20220059585A1

公开(公告)日：2022-02-24

申请号：US17519701

申请日：2021-11-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kook-tae KIM ,  Jin-gyun KIM ,  Soo-jin HONG

IPC: H01L27/146 ,  H04N5/341

Abstract: An image sensor including a semiconductor substrate having a first surface and a second surface; and a pixel isolation film extending from the first surface of the semiconductor substrate into the semiconductor substrate and defining active pixels in the semiconductor substrate, wherein the pixel isolation film includes a buried conductive layer including polysilicon containing a fining element at a first concentration; and an insulating liner between the buried conductive layer and the semiconductor substrate, and wherein the fining element includes oxygen, carbon, or fluorine.