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公开(公告)号:US20250142908A1
公开(公告)日:2025-05-01
申请号:US18738107
申请日:2024-06-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hyungki CHO , Seongjae BYEON
IPC: H01L29/10 , H01L23/31 , H01L23/522 , H01L27/06 , H01L29/24
Abstract: A semiconductor device includes: a mold insulating pattern positioned on a substrate; an upper conductive line extending in a first horizontal direction on the substrate; a channel structure including a vertical channel portion that faces a side surface of the upper conductive line, and is in contact with a first side wall of the mold insulating pattern, wherein the vertical channel portion extends in a vertical direction; a first gate dielectric layer at least partially surround a surface of the channel structure; and a second gate dielectric layer positioned between the upper conductive line and the first gate dielectric layer on the channel structure, wherein the mold insulating pattern includes a body and protrusion, wherein the body extends in the first horizontal direction, and the protrusion protrude in a second horizontal direction that intersects with the first horizontal direction.
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公开(公告)号:US20220309216A1
公开(公告)日:2022-09-29
申请号:US17491739
申请日:2021-10-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangwoon LEE , Joohyun JEON , Sungjin KIM , Seunghyun KIM , Wonki ROH , Chulwoo PARK , Seongjae BYEON , Taeyoon AN , Hyoeun JUNG
IPC: G06F30/3308 , G06F30/25
Abstract: A method of modeling damages to a crystal caused by an incident particle includes obtaining particle information and crystal information; estimating energy loss of the incident particle based on the particle information and the crystal information; estimating a volume of a vacancy based on the energy loss; estimating a vacancy reaction based on the crystal information and the volume of the vacancy; and generating output data based on the vacancy reaction, the output data including quantification data of the damages.
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公开(公告)号:US20250169058A1
公开(公告)日:2025-05-22
申请号:US18761823
申请日:2024-07-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seongjae BYEON , Si Nyeon KIM , Wonsok LEE , Juho LEE
IPC: H10B12/00
Abstract: A semiconductor device may include a bit line extending in a first direction on a substrate, a first insulating pattern extending in a second direction on the bit line, a channel pattern contacting a sidewall of the first insulating pattern and the bit line and including an oxide semiconductor material, a word line extending in the second direction and spaced apart from the channel pattern, a gate insulating pattern between the channel pattern and the word line, a second insulating pattern on the word line and the gate insulating pattern, and a landing pad electrically connected to the channel pattern. A second portion of the channel pattern between the gate insulating pattern and the bit line may be thicker than a first portion of the channel pattern, which may be between the gate insulating pattern and the first insulating pattern. The second direction may intersect the first direction.
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公开(公告)号:US20240395931A1
公开(公告)日:2024-11-28
申请号:US18425196
申请日:2024-01-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Seongjae BYEON , Younggeun Song , Wonsok Lee , Juho Lee
Abstract: A semiconductor device includes a substrate; a channel pattern on the substrate, the channel pattern having sidewalls extending in a vertical direction perpendicular to a surface of the substrate and a lower portion connecting lower portions of two sidewalls facing each other in a horizontal direction; a gate insulation layer pattern and a first conductive layer pattern sequentially stacked laterally on an inner sidewall of the channel pattern; and a second conductive layer pattern contacting at least an uppermost surface and an upper outer sidewall of the channel pattern, the second conductive pattern being spaced apart from the first conductive layer pattern.
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