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1.发明申请公开(公告)号：US20190272107A1
公开(公告)日：2019-09-05
申请号：US16415068
申请日：2019-05-17
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kyung-San Kim , Kyung Ho Kim , Seokhwan Kim , Seunguk Shin , Jihyun Lim
Abstract: A computer system includes a host and a storage device. The host provides an input/output request (IO request). The storage device receives the IO request from the host and sends an interrupt informing input/output completion (IO completion) to the host after completing the IO request. The host adjusts the number of generated interrupts of the storage device using the number of delayed IOs. The computer system may adaptively control interrupt generation of the storage device based on a load status of a CPU or the number of delayed IOs. The interrupt generation of the storage device may be adjusted to obtain a CPU gain without loss of performance or processing time of the computer system.
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公开(公告)号：US11984349B2
公开(公告)日：2024-05-14
申请号：US17482796
申请日：2021-09-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jung-Hoon Han , Seokhwan Kim , Joodong Kim , Junyong Noh , Jaewon Seo
IPC: H01L23/00 , H01L21/768
CPC classification number: H01L21/76802 , H01L21/76829 , H01L23/562
Abstract: A semiconductor device including a semiconductor substrate including a chip region and an edge region around the chip region; a lower dielectric layer and an upper dielectric layer on the semiconductor substrate; a redistribution chip pad that penetrates the upper dielectric layer on the chip region and is connected a chip pad; a process monitoring structure on the edge region; and dummy elements in the edge region and having an upper surface lower than an upper surface of the upper dielectric layer.
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3.发明公开公开(公告)号：US20230266896A1
公开(公告)日：2023-08-24
申请号：US18170354
申请日：2023-02-16
Applicant: Samsung Electronics Co., Ltd.
Inventor： Eunhee RHO , Seokhwan Kim , Yonggil Song
IPC: G06F3/06
CPC classification number: G06F3/0631 , G06F3/0623 , G06F3/064 , G06F3/0679
Abstract: A memory system may include a host system configured to split at least one data stream into a plurality of split data streams, grouping at least one unmergeable first data stream among the plurality of split data streams, and merging at least one mergeable second data stream among the plurality of split data streams, a storage device comprising one or more flash memory devices, the storage device including at least one first region and at least one second region, and processing circuitry configured to, receive at least one request to allocate at least one storage region for the tailored at least one data stream from the host system, store data blocks associated with the at least one first data stream in the first region, and store data blocks associated with the at least one second data stream in the second region.
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公开(公告)号：US11543968B2
公开(公告)日：2023-01-03
申请号：US17307098
申请日：2021-05-04
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kyung-San Kim , Kyung Ho Kim , Seokhwan Kim , Seunguk Shin , Jihyun Lim
Abstract: A computer system includes a host and a storage device. The host provides an input/output request (IO request). The storage device receives the IO request from the host and sends an interrupt informing input/output completion (IO completion) to the host after completing the IO request. The host adjusts the number of generated interrupts of the storage device using the number of delayed IOs. The computer system may adaptively control interrupt generation of the storage device based on a load status of a CPU or the number of delayed IOs. The interrupt generation of the storage device may be adjusted to obtain a CPU gain without loss of performance or processing time of the computer system.
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公开(公告)号：US10318174B2
公开(公告)日：2019-06-11
申请号：US15598850
申请日：2017-05-18
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kyung-San Kim , Kyung Ho Kim , Seokhwan Kim , Seunguk Shin , Jihyun Lim
Abstract: A computer system includes a host and a storage device. The host provides an input/output request (IO request). The storage device receives the request from the host and sends an interrupt informing input/output completion (IO completion) to the host after completing the IO request. The host adjusts the number of generated interrupts of the storage device using the number of delayed IOs. The computer system may adaptively control interrupt generation of the storage device based on a load status of a CPU or the number of delayed IOs. The interrupt generation of the storage device may be adjusted to obtain a CPU gain without loss of performance or processing time of the computer system.
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Patent Agency Ranking
公开(公告)号：US11726688B2
公开(公告)日：2023-08-15
申请号：US16834779
申请日：2020-03-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jaeyoon Choi , Seokhwan Kim , Suman Prakash Balakrishnan , Dongjin Kim , Chansol Kim , Eunhee Rho , Hyejeong Jang , Walter Jun
CPC classification number: G06F3/064 , G06F3/0619 , G06F3/0631 , G06F3/0653 , G06F3/0679 , G06F11/1068 , G06F11/1435
Abstract: A storage system communicates with a host system and includes a storage device including storage medium divided into a plurality of blocks including high reliability blocks and reserve blocks, and a controller. The controller provides the host system with block information identifying the high reliability blocks among the plurality of blocks, receives a block allocation request from the host system, wherein the block allocation request is defined with reference to the block information and identifies at least one high reliability block to be used to store metadata, and allocates at least one high reliability block to a meta region in response to the block allocation request. The controller includes a bad block manager that manages an allocation operation performed in response to the block allocation request, and a repair module that repairs an error in metadata stored in one of the high reliability blocks.
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公开(公告)号：US11301331B2
公开(公告)日：2022-04-12
申请号：US16529320
申请日：2019-08-01
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seokhwan Kim , Yonggil Song , Chui Lee , Jooyoung Hwang
Abstract: A storage device includes a nonvolatile memory device, a random access memory that includes a first region and a second region, and a controller that is configured to use the first region of the random access memory as a journal memory for a journal indicating modification of data of the second region, expose a user region of the nonvolatile memory device to an external host device as a first access region of a block unit, and expose the second region of the random access memory to the external host device as both a second access region of the block unit and a third access region of a byte unit.
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公开(公告)号：US11275516B2
公开(公告)日：2022-03-15
申请号：US16857953
申请日：2020-04-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Eunhee Rho , Suman Prakash Balakrishnan , Dongjin Kim , Seokhwan Kim , Chansol Kim , Jaeyoon Choi , Hyejeong Jang
IPC: G06F3/06
Abstract: A host system configured to communicate with a storage system, including a host flash translation layer (FTL) configured to manage a plurality of blocks included in the storage system, wherein the host FTL includes a block assignment module configured to generate priority information indicating priorities of free blocks from among the plurality of blocks based on erase count values of the free blocks, and wherein the host FTL is configured to assign a free block having a lowest erase count value, from among the free blocks, for a data write operation based on the priority information; a counting circuit configured to count a number of erase operations performed on each of the plurality of blocks; and an interface circuit configured to transmit to the storage system a block address along with an access request to the storage system, the block address indicating a position of the assigned free block.
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公开(公告)号：US11157357B2
公开(公告)日：2021-10-26
申请号：US16855000
申请日：2020-04-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Chansol Kim , Suman Prakash Balakrishnan , Seokhwan Kim
Abstract: A method of operating a memory system including a memory device, including reading data from the memory device based on a first physical address received from a host according to a read request received from the host; detecting a read error of the read data; correcting the read data based on the detecting; transmitting the corrected data to the host; asynchronously transmitting to the host an error occurrence signal for the read error; generating information about the read error; transmitting the information about the read error to the host; and rewriting the corrected data based on a second physical address received from the host according to a write request of the host.
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10.发明授权公开(公告)号：US11023137B2
公开(公告)日：2021-06-01
申请号：US16415068
申请日：2019-05-17
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kyung-San Kim , Kyung Ho Kim , Seokhwan Kim , Seunguk Shin , Jihyun Lim
Abstract: A computer system includes a host and a storage device. The host provides an input/output request (IO request). The storage device receives the IO request from the host and sends an interrupt informing input/output completion (IO completion) to the host after completing the IO request. The host adjusts the number of generated interrupts of the storage device using the number of delayed IOs. The computer system may adaptively control interrupt generation of the storage device based on a load status of a CPU or the number of delayed IOs. The interrupt generation of the storage device may be adjusted to obtain a CPU gain without loss of performance or processing time of the computer system.
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