公开(公告)号：US11562965B2

公开(公告)日：2023-01-24

申请号：US17134602

申请日：2020-12-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sun Chul Kim ,  Sang Soo Kim ,  Yong Kwan Lee ,  Hyun Ki Kim ,  Seok Geun Ahn ,  Jun Young Oh

IPC: H01L23/538 ,  H01L23/13 ,  H01L23/31 ,  H01L21/78 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor package includes a first substrate, a first semiconductor chip disposed on the first substrate, a second substrate disposed on the first semiconductor chip, a second semiconductor chip disposed on the second substrate, and a mold layer disposed between the first substrate and the second substrate. The second substrate includes a recess formed at an edge, the mold layer fills the recess, and the recess protrudes concavely inward from the edge of the second substrate toward a center of the second substrate.

公开(公告)号：US11469133B2

公开(公告)日：2022-10-11

申请号：US16805951

申请日：2020-03-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seok Geun Ahn ,  Min Keun Kwak ,  Ji Won Shin ,  Sang Hoon Lee ,  Byoung Wook Jang

IPC: H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L21/683 ,  H01L21/67 ,  B23K37/047 ,  H01L23/00 ,  B23K101/40

Abstract: A bonding apparatus includes a body part; a vacuum hole disposed in the body part; a first protruding part protruding in a first direction from a first surface of the body part; a second protruding part protruding from the first surface of the body part in the first direction and spaced farther apart from a center of the first surface of the body part than the first protruding part in a second direction intersecting with the first direction; and a trench defined by the first surface of the body part and second surfaces of the first protruding part, the second surfaces protruding in the first direction from the first surface of the body part, and the trench being connected to the vacuum hole, wherein the second protruding part protrudes farther from the first surface of the body part in the first direction than the first protruding part.

公开(公告)号：US20240222299A1

公开(公告)日：2024-07-04

申请号：US18402021

申请日：2024-01-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hwan Young CHOI ,  Seok Hyun Lee ,  Cheol Kim ,  Seok Geun Ahn

IPC: H01L23/00 ,  H01L23/48 ,  H01L23/522

CPC classification number: H01L24/08 ,  H01L23/481 ,  H01L23/5226 ,  H01L24/05 ,  H01L24/80 ,  H01L2224/05017 ,  H01L2224/05147 ,  H01L2224/05644 ,  H01L2224/08145 ,  H01L2224/80379 ,  H01L2224/80895 ,  H01L2224/80896

Abstract: A semiconductor package comprises a first semiconductor chip and a second semiconductor chip. The first semiconductor chip includes a first substrate, a first semiconductor device layer disposed on the first substrate, a first chip wiring layer disposed on the first semiconductor device layer, and a first bonding pad directly connected to the first chip wiring layer and that includes a first dishing formed thereon. The second semiconductor chip includes a second substrate, a first through-via that penetrates through the second substrate, and a second bonding pad directly connected to the first through-via and that includes a second dishing formed thereon. The first semiconductor chip and the second semiconductor chip are bonded to each other and the first bonding pad and the second bonding pad face each other, and a gold bonding layer fills the first dishing of the first bonding pad and the second dishing of the second bonding pad.

公开(公告)号：US20240264393A1

公开(公告)日：2024-08-08

申请号：US18235518

申请日：2023-08-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seok Geun Ahn ,  Haseob Seong

IPC: G02B6/42

CPC classification number: G02B6/428 ,  G02B6/4249 ,  G02B6/4293

Abstract: Disclosed is a silicon photonics package including an interposer including embedded optical components; a light source element optically connected to the optical components; a first semiconductor chip on a top surface of the interposer; a first redistribution layer on a bottom surface of the interposer; a second semiconductor chip on the first redistribution layer; a second redistribution layer on the first redistribution layer and being electrically connected to the first redistribution layer; conductive metal posts provided between the first and second redistribution layers; a mold material filling a space between the first and second redistribution layers; and a solder bump array on a bottom surface of the second redistribution layer. The top surface of the interposer includes an exposure area to which an optical fiber array is directly attached, in which an optical signal is directly transmitted between the optical components and the optical fiber array through the exposure area.

公开(公告)号：US20210375773A1

公开(公告)日：2021-12-02

申请号：US17130170

申请日：2020-12-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUHYUNG LEE ,  Seok Geun Ahn ,  Sunchul Kim

IPC: H01L23/538 ,  H01L25/065 ,  H01L25/10 ,  H01L23/373 ,  H01L23/31 ,  H01L23/13 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00

Abstract: A semiconductor package includes a first substrate including a first recess formed in a top surface of the first substrate, a first semiconductor chip disposed in the first recess and mounted on the first substrate, an interposer substrate disposed on the first semiconductor chip and including a second recess formed in a bottom surface of the interposer substrate, an adhesive layer disposed in the second recess and in contact with a top surface of the first semiconductor chip, a plurality of connection terminals spaced apart from the first recess and connecting the first substrate to the interposer substrate, and a molding layer disposed between the first substrate and the interposer substrate.

公开(公告)号：US20240063129A1

公开(公告)日：2024-02-22

申请号：US18299927

申请日：2023-04-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seok Geun Ahn ,  Seokhyun Lee ,  Yanggyoo Jung ,  Hwanyoung Choi

IPC: H01L23/538 ,  H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H10B80/00

CPC classification number: H01L23/5383 ,  H01L23/5385 ,  H01L23/49816 ,  H01L24/16 ,  H01L23/3157 ,  H01L23/5384 ,  H10B80/00 ,  H01L2224/16227

Abstract: A semiconductor package includes a package substrate, an interposer substrate on the package substrate, first connection bumps between the package substrate and the interposer substrate, first and second semiconductor chips on the interposer substrate, second connection bumps between the interposer substrate and the first and second semiconductor chips, and an upper molding layer on the interposer substrate and at least partially surrounding the first semiconductor chip and the second semiconductor chip. The interposer substrate includes a plurality of sub-interposers horizontally spaced apart from each other and each including through electrodes, a lower molding layer in a space between the sub-interposers, and a redistribution layer electrically connected to the through electrodes on the sub-interposers and the lower molding layer. A sum of areas of the sub-interposers is less than a sum of areas of the first and second semiconductor chips.

公开(公告)号：US11515262B2

公开(公告)日：2022-11-29

申请号：US17130170

申请日：2020-12-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Juhyung Lee ,  Seok Geun Ahn ,  Sunchul Kim

IPC: H01L23/538 ,  H01L25/10 ,  H01L23/373 ,  H01L23/31 ,  H01L23/13 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00 ,  H01L25/065

Abstract: A semiconductor package includes a first substrate including a first recess formed in a top surface of the first substrate, a first semiconductor chip disposed in the first recess and mounted on the first substrate, an interposer substrate disposed on the first semiconductor chip and including a second recess formed in a bottom surface of the interposer substrate, an adhesive layer disposed in the second recess and in contact with a top surface of the first semiconductor chip, a plurality of connection terminals spaced apart from the first recess and connecting the first substrate to the interposer substrate, and a molding layer disposed between the first substrate and the interposer substrate.

公开(公告)号：US20210366834A1

公开(公告)日：2021-11-25

申请号：US17134602

申请日：2020-12-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sun Chul Kim ,  Sang Soo Kim ,  Yong Kwan Lee ,  Hyun Ki Kim ,  Seok Geun Ahn ,  Jun Young Oh

IPC: H01L23/538 ,  H01L23/13 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78

Abstract: A semiconductor package includes a first substrate, a first semiconductor chip disposed on the first substrate, a second substrate disposed on the first semiconductor chip, a second semiconductor chip disposed on the second substrate, and a mold layer disposed between the first substrate and the second substrate. The second substrate includes a recess formed at an edge, the mold layer fills the recess, and the recess protrudes concavely inward from the edge of the second substrate toward a center of the second substrate.