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    METHODS OF FORMING REDISTRIBUTION LINES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES USING THE SAME
    2.
    发明申请
    METHODS OF FORMING REDISTRIBUTION LINES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES USING THE SAME 审中-公开

    公开(公告)号：US20190172865A1

    公开(公告)日：2019-06-06

    申请号：US15996480

    申请日：2018-06-03

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： YONGHOE CHO ,  JONGBO SHIM ,  SEUNGHOON YEON ,  WON IL LEE

    IPC: H01L27/146

    Abstract: A method of manufacturing a semiconducor device includes providing a semiconductor substrate having a top surface, on which has been formed a color filter and a micro-lens, and a bottom surface opposite to the top surface, forming a redistribution line on the bottom surface of the semiconductor substrate, and forming on the bottom surface of the semiconductor substrate a passivation layer covering the redistribution line. After the redistribution line and passivation layer are formed, an oxide layer between the redistribution line and the passivation is formed at a temperature that avoids thermal damage to the color filter and the micro-lens.

    SEMICONDUCTOR PACKAGE
    4.
    发明公开
    SEMICONDUCTOR PACKAGE 审中-公开

    公开(公告)号：US20230148191A1

    公开(公告)日：2023-05-11

    申请号：US18094794

    申请日：2023-01-09

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： NAMHOON KIM ,  SEUNGHOON YEON ,  YONGHOE CHO

    IPC: H01L23/00

    CPC classification number: H01L24/20 ,  H01L24/13 ,  H01L2224/214 ,  H01L2224/2101

    Abstract: Disclosed is a semiconductor package comprising a redistribution substrate, a semiconductor chip on the redistribution substrate and including a chip pad electrically connected to the redistribution substrate, and a conductive terminal on the redistribution substrate. The redistribution substrate includes a first dielectric layer, a first redistribution pattern, a second dielectric layer, a second redistribution pattern, and a first insulative pattern. The first redistribution pattern electrically connects the chip pad and the second redistribution pattern. The first insulative pattern has a first surface in contact with the first redistribution pattern and a second surface in contact with the second redistribution pattern. The second surface is opposite to the first surface. A width at the first surface of the first insulative pattern is the same as or greater than a width at the second surface of the first insulative pattern.

    SEMICONDUCTOR PACKAGE
    6.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20220013501A1

    公开(公告)日：2022-01-13

    申请号：US17178327

    申请日：2021-02-18

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： NAMHOON KIM ,  CHAJEA JO ,  Ohguk KWON ,  HYOEUN KIM ,  SEUNGHOON YEON

    IPC: H01L25/065 ,  H01L23/00

    Abstract: A semiconductor package includes a first semiconductor chip comprising a semiconductor substrate and a redistribution pattern on a top surface of the semiconductor substrate, the redistribution pattern having a hole exposing an inner sidewall of the redistribution pattern, a second semiconductor chip on a top surface of the first semiconductor chip, and a bump structure disposed between the first semiconductor chip and the second semiconductor chip. The bump structure is disposed in the hole and is in contact with the inner sidewall of the redistribution pattern.

    SEMICONDUCTOR PACKAGE
    8.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20220037279A1

    公开(公告)日：2022-02-03

    申请号：US17193435

    申请日：2021-03-05

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： NAMHOON KIM ,  SEUNGHOON YEON ,  YONGHOE CHO

    IPC: H01L23/00

    Abstract: Disclosed is a semiconductor package comprising a redistribution substrate, a semiconductor chip on the redistribution substrate and including a chip pad electrically connected to the redistribution substrate, and a conductive terminal on the redistribution substrate. The redistribution substrate includes a first dielectric layer, a first redistribution pattern, a second dielectric layer, a second redistribution pattern, and a first insulative pattern. The first redistribution pattern electrically connects the chip pad and the second redistribution pattern. The first insulative pattern has a first surface in contact with the first redistribution pattern and a second surface in contact with the second redistribution pattern. The second surface is opposite to the first surface. A width at the first surface of the first insulative pattern is the same as or greater than a width at the second surface of the first insulative pattern.

    SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
    9.
    发明申请
    SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME 有权

    公开(公告)号：US20210398929A1

    公开(公告)日：2021-12-23

    申请号：US17165429

    申请日：2021-02-02

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： HYOEUN KIM ,  SUNKYOUNG SEO ,  SEUNGHOON YEON ,  CHAJEA JO

    IPC: H01L23/00 ,  H01L25/065 ,  H01L23/31 ,  H01L23/538

    Abstract: A semiconductor package includes at least one second semiconductor chip stacked on a first semiconductor chip. An underfill layer is interposed between the first semiconductor chip and the at least one second semiconductor chip. The first semiconductor chip includes a first substrate, a first passivation layer disposed on the first substrate. The first passivation layer includes a first recess region. A first pad covers a bottom surface and sidewalls of the first recess region. The at least one second semiconductor chip includes a second substrate, a second passivation layer disposed adjacent to the first substrate, a conductive bump protruding outside the second passivation layer towards the first semiconductor chip and an inter-metal compound pattern disposed in direct contact with both the conductive bump and the first pad. The underfill layer is in direct contact with both the conductive bump and the inter-metal compound pattern.

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