OPERATION METHOD OF ELECTRONIC DEVICE

    公开(公告)号:US20250061027A1

    公开(公告)日:2025-02-20

    申请号:US18765381

    申请日:2024-07-08

    Abstract: An embodiment of the present disclosure provides an operation method of an electronic device that stores a first setup value for a first function of an external device that stores setup backup data may include establishing a connection to the external device, receiving, in response to the establishing of the connection to the external device, a first setup backup value included in the setup backup data from the external device, and updating the first setup value based on the first setup backup value.

    THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE

    公开(公告)号:US20240357800A1

    公开(公告)日:2024-10-24

    申请号:US18528854

    申请日:2023-12-05

    CPC classification number: H10B12/482 H10B12/485 H10B12/488

    Abstract: A semiconductor device includes a first bit line extending in a first direction, a first semiconductor pattern extending in a second direction and including first and second ends opposite to each other, the first end of the first semiconductor pattern being in contact with the first bit line, a first word line on the first semiconductor pattern and extending in a third direction, a selection line adjacent to the second end of the first semiconductor pattern and parallel to the third direction, a second semiconductor pattern interposed between the selection line and the first semiconductor pattern and having first end and second ends opposite to each other, a second bit line extending in the first direction and in contact with the first end of the second semiconductor pattern, and a source line extending in the first direction and in contact with the second end of the second semiconductor pattern.

    SEMICONDUCTOR DEVICES INCLUDING SUPPORT PATTERN AND METHODS OF FABRICATING THE SAME

    公开(公告)号:US20210043722A1

    公开(公告)日:2021-02-11

    申请号:US16860136

    申请日:2020-04-28

    Abstract: Disclosed are semiconductor devices including support patterns and methods of fabricating the same. The semiconductor devices may include a plurality of vertical structures on a substrate and a support pattern that contacts sidewalls of the plurality of vertical structures. The support pattern may include a plurality of support holes extending through the support pattern. The plurality of support holes may include a first support hole and a second support hole that are spaced apart from each other, and the first support hole may have a shape or size different from a shape or size of the second support hole.

    SEMICONDUCTOR MEMORY DEVICE
    4.
    发明申请

    公开(公告)号:US20250142810A1

    公开(公告)日:2025-05-01

    申请号:US18675285

    申请日:2024-05-28

    Abstract: A semiconductor memory device includes a bit line extending above a substrate in a second horizontal direction, first and second active patterns beneath the bit line, each of the first and second active patterns having a first surface in contact with the bit line without a dopant source layer therebetween and a second surface opposite to the first surface in a vertical direction, a back-gate electrode between the first and second active patterns and extending above the substrate in a first horizontal direction by crossing the bit line, a first word line extending in the first horizontal direction at one side of the first active pattern, a second word line extending in the first horizontal direction at an opposite side of the second active pattern, and contact patterns in contact with the second surfaces of the first and second active patterns.

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