公开(公告)号：US20190238891A1

公开(公告)日：2019-08-01

申请号：US16257219

申请日：2019-01-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chan Heo ,  Kyung-mok Kum ,  Jong-kwon Park ,  Rakie Kim

IPC: H04N19/86 ,  H04N19/423 ,  G06F12/02

CPC classification number: H04N19/86 ,  G06F12/0223 ,  H04N19/423

Abstract: Provided are a method of processing images and an electronic device thereof. The electronic device includes a memory and a processor operatively connected to the memory. The processor is configured to divide an image into a plurality of sub images, load information about a first sub image of the plurality of sub images into the memory, perform image processing on the first sub image, load information about an image area that does not overlap with the first sub image of a second sub image located in a longitudinal direction of the first sub image into the memory, and perform image processing on the second sub image.

公开(公告)号：US11422852B2

公开(公告)日：2022-08-23

申请号：US16205727

申请日：2018-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Won Jin Kim ,  Keong Ho Lee ,  Hyuk Min Kwon ,  Rakie Kim

IPC: G06F9/46 ,  G06F9/48 ,  G06F9/50

Abstract: A processor includes a plurality of cores configured to perform operations independently, a memory, and a control circuit electrically connected to the plurality of cores and the memory. The control circuit is configured to acquire one or more instructions associated with a task, store data corresponding to the task based on the one or more instructions, transmit the instructions to the at least some cores, check one or more cores that have responded to the instructions among the at least some cores, prevent the task from being allocated to the cores except for one core if the task is allocated to the one core, and allocate the task to one of the cores, the allocation of the task including changing state information associated with the allocation and setting other cores not allocated the task among the plurality of cores not to access the data corresponding to the task.

公开(公告)号：US20160041845A1

公开(公告)日：2016-02-11

申请号：US14821640

申请日：2015-08-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Uison Yoon ,  Rakie Kim ,  Jijoong Moon ,  Cheolyong Jeon

IPC: G06F9/50

CPC classification number: G06F9/505 ,  G06F9/5094 ,  G06F2209/5022 ,  G06F2209/504 ,  Y02D10/22

Abstract: An apparatus includes a calculation processing unit configured to perform a calculation in the electronic device, a device manager configured to controls a speed of the calculation processing unit and output load factor information, one or more user-level application programs with a respective load factor limit, configured to request for load factor limit information of the calculation processing unit and calculation of a load with a load factor limit, and a service quality manager configured to receive the load factor limit information and the load with the load factor limit from the user-level application programs with the load factor limit, receive load factor information of the calculation processing unit from the device manager, generate a calculation parameter so that a load factor of the calculation processing unit is within the load factor limit information, and output the load with the load factor limit and the generated calculation parameter.

Abstract translation: 一种装置包括：计算处理单元，被配置为在电子设备中执行计算;设备管理器，被配置为控制计算处理单元的速度并输出负载因子信息;一个或多个用户级应用程序，具有相应的负载因子极限 ，被配置为请求所述计算处理单元的负载因子限制信息和计算负载因子限制的负载;以及服务质量管理器，被配置为从所述用户接口装置接收所述负载因子限制信息和所述负载因子限制的负载， 具有负载因子限制的级别应用程序，从设备管理器接收计算处理单元的负载因子信息，生成计算参数，使得计算处理单元的负载因子在负载因子限制信息内，并且输出负载 负载因子限制和生成的计算参数。

公开(公告)号：US11132302B2

公开(公告)日：2021-09-28

申请号：US16480255

申请日：2018-01-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Rakie Kim ,  Min-Wook Ahn ,  Kyung-Mok Kum ,  Keon-Cheol Shin

IPC: G06F12/10 ,  G06F12/1081 ,  G06F3/06

Abstract: An electronic device may comprise: a first memory for storing first data at a designated rate; a first processor connected to the first memory and configured to divide the first data into multiple second data, each having a size smaller than the size of the first data; a second memory for storing at least some of the multiple second data at a rate faster than the designated rate; a second processor connected to the second memory and configured to process the at least some of the multiple second data; and a DMA control module, connected to the second processor, for transmitting/receiving data between the first memory and the second memory, wherein the DMA control module is configured to: at least on the basis of a processing command for the multiple second data which is transmitted from the first processor to the second processor, receive, from the first memory, the at least some of the multiple small-sized second data divided from the first data; transmit the at least some of the multiple second data to the second processor; and transmit, to the first memory, third data processed by the second processor by using the at least some of the multiple second data.

公开(公告)号：US10474574B2

公开(公告)日：2019-11-12

申请号：US15781316

申请日：2016-12-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changhun Yu ,  Wonjin Kim ,  Hyunsik Kim ,  Sunho Moon ,  Minwook Ahn ,  Rakie Kim ,  Kyoungsoo Cho ,  Nikunj Saunshi ,  Parichay Kapoor ,  Pankaj Agarwal ,  Won-Sub Kim ,  Jin-Hyo Kim ,  Hyunghoon Kim ,  Jisu Oh ,  Keongho Lee ,  Seung-Beom Lee ,  Jinseok Lee ,  Dong-Gi Jang ,  Subin Jo ,  Apoorv Kansal

IPC: G06F12/00 ,  G06F12/06 ,  G06F12/02 ,  G06F12/0882 ,  G06F9/50 ,  G06F12/0817 ,  G06F12/1009

Abstract: The present disclosure relates to system resource management in a variety of situations. The present disclosure provides a method and an apparatus for reducing memory requirements and improving processing speed when an electronic device performs padding for a particular arithmetic operation on data. To achieve the above objective, a method for operating an electronic device according to the present disclosure comprises the steps of: reading a first portion of data from a first memory; determining a first padding address based on the address of a byte belonging to a boundary region of the data among a plurality of bytes included in the first portion; writing values of the plurality of bytes and a value corresponding to the first padding address to a second memory; and reading a second portion of the data from the first memory.

公开(公告)号：US20190179670A1

公开(公告)日：2019-06-13

申请号：US16205727

申请日：2018-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Won Jin Kim ,  Keong Ho Lee ,  Hyuk Min Kwon ,  Rakie Kim

IPC: G06F9/48 ,  G06F9/50

Abstract: A processor includes a plurality of cores configured to perform operations independently, a memory, and a control circuit electrically connected to the plurality of cores and the memory. The control circuit is configured to acquire one or more instructions associated with a task, store data corresponding to the task based on the one or more instructions, transmit the instructions to the at least some cores, check one or more cores that have responded to the instructions among the at least some cores, prevent the task from being allocated to the cores except for one core if the task is allocated to the one core, and allocate the task to one of the cores, the allocation of the task including changing state information associated with the allocation and setting other cores not allocated the task among the plurality of cores not to access the data corresponding to the task.

公开(公告)号：US09904582B2

公开(公告)日：2018-02-27

申请号：US14821640

申请日：2015-08-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Uison Yoon ,  Rakie Kim ,  Jijoong Moon ,  Cheolyong Jeon

IPC: G06F9/46 ,  G06F9/50

CPC classification number: G06F9/505 ,  G06F9/5094 ,  G06F2209/5022 ,  G06F2209/504 ,  Y02D10/22

Abstract: An apparatus includes a calculation processing unit configured to perform a calculation in the electronic device, a device manager configured to controls a speed of the calculation processing unit and output load factor information, one or more user-level application programs with a respective load factor limit, configured to request for load factor limit information of the calculation processing unit and calculation of a load with a load factor limit, and a service quality manager configured to receive the load factor limit information and the load with the load factor limit from the user-level application programs with the load factor limit, receive load factor information of the calculation processing unit from the device manager, generate a calculation parameter so that a load factor of the calculation processing unit is within the load factor limit information, and output the load with the load factor limit and the generated calculation parameter.

公开(公告)号：US10162671B2

公开(公告)日：2018-12-25

申请号：US14391860

申请日：2013-04-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Rakie Kim ,  Myung-Sun Kim

IPC: G06F9/46 ,  G06F11/34 ,  G06F9/50

Abstract: A method and an apparatus for performing task scheduling in a terminal are provided. The terminal includes at least two different types of cores and determines if a change in a task state has occurred in response to at least one of the two cores, If a change in a task state has occurred, the terminal determines, for said at least one core, the variation in the duration of each of a plurality of tasks being executed, predicts the duration of each of the plurality of tasks on the basis of the change in the task state using the determined variation, and performs task scheduling for said at least one core in accordance with the predicted duration.

公开(公告)号：US09971721B2

公开(公告)日：2018-05-15

申请号：US14824476

申请日：2015-08-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ilhyun Cho ,  Soonwan Kwon ,  Kibeom Kim ,  Rakie Kim

IPC: G06F13/40 ,  G06F3/01 ,  G06F1/32 ,  G06F3/023 ,  G06F3/0488

CPC classification number: G06F13/4022 ,  G06F1/3215 ,  G06F1/324 ,  G06F1/3243 ,  G06F1/3296 ,  G06F3/023 ,  G06F3/04886 ,  Y02D10/126 ,  Y02D10/151 ,  Y02D10/152 ,  Y02D10/172

Abstract: A method for controlling performance of an electronic device is provided. The method includes sensing user input, predicting user input speed, and controlling at least one processing unit of the electronic device based on a predicted user input speed and performance assignment information. Here, the performance assignment information includes control information mapped respectively with user input speeds for controlling the at least one processing unit of the electronic device.

公开(公告)号：US20150067700A1

公开(公告)日：2015-03-05

申请号：US14391860

申请日：2013-04-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Rakie Kim ,  Myung-Sun Kim

IPC: G06F9/46

CPC classification number: G06F9/46 ,  G06F9/50 ,  G06F11/3419 ,  G06F11/3433 ,  G06F11/3466 ,  G06F2201/865 ,  G06F2209/5019

Abstract: A method and an apparatus for performing task scheduling in a terminal are provided. The terminal includes at least two different types of cores and determines if a change in a task state has occurred in response to at least one of the two cores, If a change in a task state has occurred, the terminal determines, for said at least one core, the variation in the duration of each of a plurality of tasks being executed, predicts the duration of each of the plurality of tasks on the basis of the change in the task state using the determined variation, and performs task scheduling for said at least one core in accordance with the predicted duration.

Abstract translation: 提供了一种用于在终端中执行任务调度的方法和装置。 终端包括至少两种不同类型的核，并且确定是否响应于两个核中的至少一个而发生了任务状态的改变。如果任务状态的改变已经发生，终端确定至少 一个核心，正在执行的多个任务中的每一个的持续时间的变化，使用所确定的变化量，基于任务状态的改变来预测多个任务中的每个任务的持续时间，并且对所述第 根据预测的持续时间，至少一个核心。