Flip flop circuit
    2.
    发明授权

    公开(公告)号:US10812055B2

    公开(公告)日:2020-10-20

    申请号:US16661205

    申请日:2019-10-23

    Abstract: Embodiments herein disclose a flip flop comprising at least one of a slave circuit and a retention circuit receiving an input from a master circuit. The output circuit receives an input (X1) from at least one of the slave circuit and the retention circuit. A first node and a second node in the retention circuit receive a power supply from a global power supply through transistors, when a retention is 0 in the retention circuit, so that the slave circuit retains a current state of the X1 and X2 irrespective of a clock input in the slave circuit, and the output circuit receives the stored state of the retention circuit, when a local power supply is turned ON.

    FLIP FLOP
    4.
    发明申请
    FLIP FLOP 审中-公开

    公开(公告)号:US20200136594A1

    公开(公告)日:2020-04-30

    申请号:US16661205

    申请日:2019-10-23

    Abstract: Embodiments herein disclose a flip flop comprising at least one of a slave circuit and a retention circuit receiving an input from a master circuit. The output circuit receives an input (X1) from at least one of the slave circuit and the retention circuit. A first node and a second node in the retention circuit receive a power supply from a global power supply through transistors, when a retention is 0 in the retention circuit, so that the slave circuit retains a current state of the X1 and X2 irrespective of a clock input in the slave circuit, and the output circuit receives the stored state of the retention circuit, when a local power supply is turned ON.

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