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    SEMICONDUCTOR DEVICES
    1.
    发明申请
    SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：US20180261601A1

    公开(公告)日：2018-09-13

    申请号：US15974943

    申请日：2018-05-09

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Nam-Gun KIM ,  Joonkyu Rhee ,  Ji-Hye Lee ,  Chanmi Lee ,  Taeseop Choi

    IPC: H01L27/108 ,  H01L21/768

    CPC classification number: H01L27/10814 ,  H01L21/7682 ,  H01L21/76897 ,  H01L27/10823 ,  H01L27/10855 ,  H01L27/10885 ,  H01L27/10888

    Abstract: Example embodiments relate to a semiconductor device. The semiconductor device includes a substrate including an active region extending in a first direction, a plurality of bit lines running across the active region in a second direction crossing the first direction, a first spacer on a sidewall of the bit line, and a storage node contact on the active region between adjacent bit lines. The first spacer includes a first part between the storage node contact and the bit line, a second part between the first part and the storage node contact, and a third part between the first and second parts. A minimum vertical thickness of the first part is greater than a maximum vertical thickness of the third part. The maximum vertical thickness of the third part is greater than a maximum vertical thickness of the second part.

    SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME
    3.
    发明申请
    SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME 审中-公开

    公开(公告)号：US20170294439A1

    公开(公告)日：2017-10-12

    申请号：US15433199

    申请日：2017-02-15

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Nam-Gun KIM ,  Chanmi Lee ,  Joonkyu Rhee ,  Ji-Hye Lee ,  Taeseop Choi

    IPC: H01L27/108

    CPC classification number: H01L27/10805 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10852 ,  H01L27/10876 ,  H01L27/10882 ,  H01L27/10885 ,  H01L27/228 ,  H01L27/2436

    Abstract: Semiconductor devices and method of manufacturing the same are provided. The devices may include a substrate including a first impurity region and second impurity regions spaced apart from the first impurity region and a conductive line. The conductive line may extend in a first direction and may be electrically connected to the first impurity region. The devices may also include first conductive contacts on a side of the conductive line and arranged in the first direction and first insulation patterns on the side of the conductive line and arranged in the first direction. The first conductive contacts may be electrically connected to the second impurity regions. The first conductive contacts and the first insulation patterns may be alternately disposed along the first direction. Top surfaces of the first insulation patterns may be lower than a top surface of the conductive line relative to an upper surface of the substrate.

    SEMICONDUCTOR DEVICES
    4.
    发明申请
    SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：US20190287975A1

    公开(公告)日：2019-09-19

    申请号：US16422054

    申请日：2019-05-24

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Nam-Gun KIM ,  Joonkyu RHEE ,  Ji-Hye Lee ,  Chanmi LEE ,  Taeseop CHOI

    IPC: H01L27/108

    Abstract: Example embodiments relate to a semiconductor device. The semiconductor device includes a substrate including an active region extending in a first direction, a plurality of bit lines running across the active region in a second direction crossing the first direction, a first spacer on a sidewall of the bit line, and a storage node contact on the active region between adjacent bit lines. The first spacer includes a first part between the storage node contact and the bit line, a second part between the first part and the storage node contact, and a third part between the first and second parts. A minimum vertical thickness of the first part is greater than a maximum vertical thickness of the third part. The maximum vertical thickness of the third part is greater than a maximum vertical thickness of the second part.

    SEMICONDUCTOR DEVICES
    6.
    发明申请
    SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20170271340A1

    公开(公告)日：2017-09-21

    申请号：US15405808

    申请日：2017-01-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Nam-Gun KIM ,  Joonkyu RHEE ,  Ji-Hye LEE ,  Chanmi LEE ,  Taeseop CHOI

    IPC: H01L27/108 ,  H01L23/532 ,  H01L21/768 ,  H01L23/528

    CPC classification number: H01L27/10814 ,  H01L21/7682 ,  H01L27/10823 ,  H01L27/10855 ,  H01L27/10885 ,  H01L27/10888

    Abstract: Example embodiments relate to a semiconductor device. The semiconductor device includes a substrate including an active region extending in a first direction, a plurality of bit lines running across the active region in a second direction crossing the first direction, a first spacer on a sidewall of the bit line, and a storage node contact on the active region between adjacent bit lines. The first spacer includes a first part between the storage node contact and the bit line, a second part between the first part and the storage node contact, and a third part between the first and second parts. A minimum vertical thickness of the first part is greater than a maximum vertical thickness of the third part. The maximum vertical thickness of the third part is greater than a maximum vertical thickness of the second part.

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