公开(公告)号：US10896917B2

公开(公告)日：2021-01-19

申请号：US16722155

申请日：2019-12-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min Sung Song ,  Heung Jin Joo ,  Kwan Yong Kim ,  Jin Woo Park ,  Du Heon Song ,  He Jueng Lee ,  Myung Ho Jung

IPC: H01L27/1157 ,  H01L27/11582 ,  H01L27/11573 ,  H01L27/11565 ,  H01L27/11575 ,  G11C16/08

Abstract: In some embodiments, 3-dimensional semiconductor memory device includes a semiconductor substrate extending horizontally in a first direction and a second direction crossing the first direction. A stacked memory cell array is formed on the semiconductor substrate. The memory device further includes a separation pattern including a plurality of separation lines extending in the first direction and arranged in the second direction, and dividing the stacked memory cell array into a plurality of memory cell structures extending in the first direction and arranged in the second direction. An upper insulating layer is formed above the plurality of memory cell structures and separation lines, and a passivation layer is formed above the upper insulating layer. The passivation layer includes a plurality of first regions having a first vertical thickness. A plurality of gap regions in the passivation layer are formed between the plurality of first regions. The plurality of first regions vertically overlap the plurality of memory cell structures, and the plurality of gap regions vertically overlap the plurality of separation lines.

公开(公告)号：US10724967B2

公开(公告)日：2020-07-28

申请号：US16242088

申请日：2019-01-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung Ho Jung ,  Young Su Ryu ,  Sung Chai Kim ,  Jong Su Kim ,  Won Guk Seo ,  Chang Hoon Choi ,  Jeong Su Ha

IPC: G01N21/00 ,  G01N21/956 ,  G06T7/00 ,  G01N21/95 ,  H01L21/67 ,  H01L21/677 ,  G06T7/11

Abstract: An inspection apparatus for a semiconductor process and a semiconductor process device, the inspection apparatus including a transferer configured to transfer a process object between a plurality of chambers; at least one line camera installed above the transferer, the at least one line camera being configured to generate an original image by capturing an image of the process object transferred by the transferer; and a controller configured to receive the original image and to perform an inspection of the process object by correcting distortion of the original image due to a change in transfer speed of the transferer.

公开(公告)号：US10529736B2

公开(公告)日：2020-01-07

申请号：US16138416

申请日：2018-09-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min Sung Song ,  Heung Jin Joo ,  Kwan Yong Kim ,  Jin Woo Park ,  Du Heon Song ,  He Jueng Lee ,  Myung Ho Jung

IPC: H01L27/11582 ,  H01L27/1157 ,  H01L27/11573 ,  G11C16/08

Abstract: In some embodiments, 3-dimensional semiconductor memory device includes a semiconductor substrate extending horizontally in a first direction and a second direction crossing the first direction. A stacked memory cell array is formed on the semiconductor substrate. The memory device further includes a separation pattern including a plurality of separation lines extending in the first direction and arranged in the second direction, and dividing the stacked memory cell array into a plurality of memory cell structures extending in the first direction and arranged in the second direction. An upper insulating layer is formed above the plurality of memory cell structures and separation lines, and a passivation layer is formed above the upper insulating layer. The passivation layer includes a plurality of first regions having a first vertical thickness. A plurality of gap regions in the passivation layer are formed between the plurality of first regions. The plurality of first regions vertically overlap the plurality of memory cell structures, and the plurality of gap regions vertically overlap the plurality of separation lines.