公开(公告)号：US20210342151A1

公开(公告)日：2021-11-04

申请号：US17241159

申请日：2021-04-27

Applicant: SAMSUNG ELECTRONICS CO., LTD

Inventor： KYOUNGHO KIM ,  Changsik Yoo ,  Baekjin Lim

IPC: G06F9/30 ,  G06F1/10 ,  G06F9/38

Abstract: A data transmitting and receiving system includes a first device including an encoder configured to encode row data to generate precoding data and a transmitter configured to transmit the precoding data through a transmission channel and a second device including an integrator configured to perform an integral on the precoding data, an integral sampler including a plurality of samplers configured to output sampling data based on an offset value and an output value of the integrator, a decoder configured to decode outputs of some of the samplers to generate decoded data, and a phase detector configured to detect a phase difference between the precoding data and a clock based on the decoded data and an output of another one of the samplers.

公开(公告)号：US20230047923A1

公开(公告)日：2023-02-16

申请号：US17680425

申请日：2022-02-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KYOUNGHO KIM ,  CHULWOO KIM ,  HYUNSU PARK ,  JINCHEOL SIM

IPC: G11C29/12 ,  G11C29/36 ,  G11C29/46

Abstract: A semiconductor device includes a multilevel receiver including a signal determiner receiving a plurality of multilevel signals and outputting a result of mutual comparison of the plurality of multilevel signals as an N-bit signal, where N is a natural number equal to or greater than 2. A decoder restores a valid signal among the N-bit signals from the signal determiner to an M-bit data signal, where M is a natural number less than N. A clock generator receives a reference clock signal, generates an input clock signal using the reference clock signal, inputs the input clock signal to the signal determiner, and determines a phase of the input clock signal based on an occurrence probability of an invalid signal not restored to the M-bit data signal among the N-bit signals.

公开(公告)号：US20210313937A1

公开(公告)日：2021-10-07

申请号：US17176239

申请日：2021-02-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： KYOUNGHO KIM ,  Chulwoo KIM ,  Hyunsu PARK ,  Jin-Cheol SIM

IPC: H03F3/217 ,  H04L25/02 ,  H03F3/45 ,  H03F1/32

Abstract: A signal receiver includes a data sampler receiving a differential input signal having first and second input signals and determining bit values of the differential input signal based on first and second reference voltages, and a reference voltage generator performing a pre-tuning operation and a post-tuning operation to generate the reference voltages. The reference voltage generator performs the pre-tuning operation by generating first and second initial voltages and adjusting one of the initial voltages to generate third and fourth voltages. After the pre-tuning operation, the reference voltage generator performs the post-tuning operation by increasing or decreasing the third voltage to generate the first reference voltage and decreasing or increasing the fourth voltage to generate the second reference voltage based on a comparison result between the third voltage and the first input signal and a second comparison result between the fourth voltage and second input signal.