公开(公告)号：US20230047923A1

公开(公告)日：2023-02-16

申请号：US17680425

申请日：2022-02-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KYOUNGHO KIM ,  CHULWOO KIM ,  HYUNSU PARK ,  JINCHEOL SIM

IPC: G11C29/12 ,  G11C29/36 ,  G11C29/46

Abstract: A semiconductor device includes a multilevel receiver including a signal determiner receiving a plurality of multilevel signals and outputting a result of mutual comparison of the plurality of multilevel signals as an N-bit signal, where N is a natural number equal to or greater than 2. A decoder restores a valid signal among the N-bit signals from the signal determiner to an M-bit data signal, where M is a natural number less than N. A clock generator receives a reference clock signal, generates an input clock signal using the reference clock signal, inputs the input clock signal to the signal determiner, and determines a phase of the input clock signal based on an occurrence probability of an invalid signal not restored to the M-bit data signal among the N-bit signals.