公开(公告)号：US20210384324A1

公开(公告)日：2021-12-09

申请号：US16947247

申请日：2020-07-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： KANG ILL SEO ,  JOON GOO HONG

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/10 ,  H01L21/308

Abstract: Integrated circuit devices and methods of forming the same are provided. The methods may include sequentially forming an underlying mask layer and a preliminary first mask layer on a substrate, forming a first mask structure by removing a portion of the preliminary first mask layer, and then forming a preliminary second mask layer. The preliminary second mask layer may enclose the first mask structure in a plan view. The methods may also include forming a second mask structure by removing a portion of the preliminary second mask layer and forming a vertical channel region including a portion of the substrate by sequentially etching the underlying mask layer and the substrate. The second mask structure may be connected to the first mask structure, and etching the underlying mask layer may be performed using the first and the second mask structures as an etch mask.

公开(公告)号：US20190355822A1

公开(公告)日：2019-11-21

申请号：US16275675

申请日：2019-02-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： YOUNG CHAI JUNG ,  MYUNG GIL KANG ,  KANG ILL SEO ,  SEON BAE KIM ,  YONG HEE PARK

IPC: H01L29/417 ,  H01L29/78 ,  H01L29/45 ,  H01L29/66 ,  H01L23/522

Abstract: VFET devices are provided. A VFET device includes a substrate including first and second protruding portions. The VFET device includes an isolation region between the first and second protruding portions. The VFET device includes first and second silicide regions on the first and second protruding portions, respectively. Moreover, the VFET device includes a contact on the first and second silicide regions. Related methods of forming a VFET device are also provided.

公开(公告)号：US20210013112A1

公开(公告)日：2021-01-14

申请号：US17032085

申请日：2020-09-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： SA HWAN HONG ,  YONG HEE PARK ,  KANG ILL SEO

IPC: H01L21/8238 ,  H01L29/66 ,  H01L21/308

Abstract: Vertical field-effect transistor (VFET) devices and methods of forming the devices are provided. The methods may include forming a channel region including a first channel region and a second channel region, forming a first cavity in the substrate, forming a first bottom source/drain in the first cavity, forming a second cavity in the substrate, and forming a second bottom source/drain in the second cavity. The first cavity may expose a lower surface of the first channel region, and the second cavity may expose a lower surface of the second channel region. The method may also include after forming the first bottom source/drain and the second bottom source/drain, removing a portion of the channel region between the first channel region and the second channel region to separate the first channel region from the second channel region.

公开(公告)号：US20240170486A1

公开(公告)日：2024-05-23

申请号：US18425476

申请日：2024-01-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JEONGHYUK YIM ,  KI-IL KIM ,  GIL HWAN SON ,  KANG ILL SEO

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/40 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/0922 ,  H01L21/82385 ,  H01L21/823857 ,  H01L21/823871 ,  H01L29/0665 ,  H01L29/401 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/42392 ,  H01L29/66742 ,  H01L29/78645

Abstract: Integrated circuit devices may include two transistor stacks including lower transistors having different threshold voltages and upper transistors having different threshold voltages. Gate insulators of the lower transistors may have different dipole elements or different areal densities of dipole elements, and the upper transistors may have different gate electrode structures.

公开(公告)号：US20220375935A1

公开(公告)日：2022-11-24

申请号：US17387178

申请日：2021-07-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： JEONGHYUK YIM ,  KI-IL KIM ,  GIL HWAN SON ,  KANG ILL SEO

IPC: H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/40 ,  H01L29/66 ,  H01L29/786 ,  H01L21/8238

Abstract: Integrated circuit devices may include two transistor stacks including lower transistors having different threshold voltages and upper transistors having different threshold voltages. Gate insulators of the lower transistors may have different dipole elements or different areal densities of dipole elements, and the upper transistors may have different gate electrode structures.