公开(公告)号：US11145601B2

公开(公告)日：2021-10-12

申请号：US16430630

申请日：2019-06-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yoon Sung Kim ,  Yun Hee Kim ,  Byung Moon Bae ,  Hyun Su Sim ,  Jun Ho Yoon ,  Jung Ho Choi

IPC: H01L23/544 ,  H01L23/31 ,  H01L23/29

Abstract: A semiconductor chip including an alignment pattern is provided. The semiconductor chip includes a substrate associated with a main chip region of a semiconductor wafer and including a scribe lane. A lower interlayer insulating layer is disposed on the substrate, a low-K layer including dummy metal patterns is disposed on the lower interlayer insulating layer, an alignment pattern is disposed on the low-K layer, and a passivation layer covers the alignment pattern.

公开(公告)号：US10607855B2

公开(公告)日：2020-03-31

申请号：US15862541

申请日：2018-01-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jun Ho Yoon ,  Jae Hong Park ,  Da Il Eom ,  Sung Yeon Kim ,  Jin Young Park ,  Yong Moon Jang

IPC: H01L21/3213 ,  H01L21/308 ,  H01L21/311 ,  H01L27/108 ,  G03F1/00 ,  H01L21/304 ,  H01L49/02 ,  H01L21/033

Abstract: A method for fabricating a semiconductor device includes forming an insulating layer on a substrate; forming a first mask pattern including silicon on the insulating layer and forming a second mask pattern including an oxide on the first mask pattern; forming a coating layer that includes carbon and which covers an upper surface of the insulating layer, a sidewall of the first mask pattern, and the second mask pattern; removing a portion of the coating layer and the second mask pattern; forming a metal layer on an upper surface of the first mask pattern and on a sidewall of the coating layer; exposing the upper surface of the insulating layer by removing the coating layer; and etching the insulating layer by using the first mask pattern and the metal layer as a mask.

公开(公告)号：US10886234B2

公开(公告)日：2021-01-05

申请号：US16534051

申请日：2019-08-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jun Ho Yoon ,  Yoon Sung Kim ,  Yun Hee Kim ,  Byung Moon Bae ,  Hyun Su Sim ,  Jung Ho Choi

IPC: H01L23/544 ,  H01L23/31 ,  H01L23/00 ,  H01L21/78 ,  H01L21/782 ,  H01L21/784

Abstract: A semiconductor device is provided. The semiconductor device includes: a substrate which includes a semiconductor chip region and a scribe line region surrounding the semiconductor chip region; an insulating film arranged over the semiconductor chip region and the scribe line region on the substrate, and including a first surface, a second surface opposite to the first surface, a third surface connecting the first surface and the second surface, and a fourth surface opposite to the third surface and connecting the first surface and the second surface; and an opening portion formed on the second surface of the insulating film and the fourth surface of the insulating film to expose the substrate, wherein the opening portion is formed in the scribe line region, and the first surface of the insulating film and the third surface of the insulating film do not include an opening portion which expose the substrate.

公开(公告)号：US10319805B2

公开(公告)日：2019-06-11

申请号：US15626271

申请日：2017-06-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun Ho Yoon ,  Won Chul Lee ,  Sung Yeon Kim ,  Jae Hong Park ,  Chan Hoon Park ,  Yong Moon Jang ,  Je Woo Han

IPC: H01L21/28 ,  H01L21/283 ,  H01L21/311 ,  H01L49/02 ,  H01L21/033 ,  H01L21/3205 ,  H01L21/8242 ,  H01L21/306

Abstract: Provided is a method of fabricating a semiconductor device. The method includes forming an oxide film on a target layer, forming a first mask film on the oxide film, wherein the first mask film contains a semiconductor material and has a first thickness and a first etch selectivity with respect to the oxide film, forming a second mask film on the first mask film, wherein the second mask film contains a metal and has a second thickness smaller than the first thickness and a second etch selectivity larger than the first etch selectivity with respect to the oxide film, forming a second mask film pattern by patterning the second mask film, forming a first mask film pattern by patterning the first mask film, etching some portions of the oxide film by using the second mask film pattern as an etch mask film, and etching the rest of the oxide film by using the first mask film pattern as an etch mask film to form a hole, wherein the target layer is exposed via the hole.

公开(公告)号：US11244911B2

公开(公告)日：2022-02-08

申请号：US16389367

申请日：2019-04-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yoon Sung Kim ,  Yun Hee Kim ,  Byung Moon Bae ,  Hyun Su Sim ,  Jun Ho Yoon ,  Jung Ho Choi

IPC: H01L23/58

Abstract: A semiconductor chip includes a substrate including: a main chip region; and a scribe lane surrounding the main chip region; a lower interlayer insulating layer disposed on the substrate in the scribe lane; a circuit structure disposed on the lower interlayer insulating layer in the scribe lane; and a pad structure disposed on the lower interlayer insulating layer. The circuit structure and the pad structure are disposed to be spaced apart from each other in a longitudinal direction of the scribe lane.

公开(公告)号：US10720491B2

公开(公告)日：2020-07-21

申请号：US16419153

申请日：2019-05-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun Ho Yoon ,  Won Chul Lee ,  Sung Yeon Kim ,  Jae Hong Park ,  Chan Hoon Park ,  Yong Moon Jang ,  Je Woo Han

IPC: H01L21/28 ,  H01L21/283 ,  H01L21/311 ,  H01L49/02 ,  H01L21/033 ,  H01L21/3205 ,  H01L21/8242 ,  H01L21/306

Abstract: Provided is a method of fabricating a semiconductor device. The method includes forming an oxide film on a target layer, forming a first mask film on the oxide film, wherein the first mask film contains a semiconductor material and has a first thickness and a first etch selectivity with respect to the oxide film, forming a second mask film on the first mask film, wherein the second mask film contains a metal and has a second thickness smaller than the first thickness and a second etch selectivity larger than the first etch selectivity with respect to the oxide film, forming a second mask film pattern by patterning the second mask film, forming a first mask film pattern by patterning the first mask film, etching some portions of the oxide film by using the second mask film pattern as an etch mask film, and etching the rest of the oxide film by using the first mask film pattern as an etch mask film to form a hole, wherein the target layer is exposed via the hole.