公开(公告)号：US09813099B2

公开(公告)日：2017-11-07

申请号：US15148385

申请日：2016-05-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung-Moon Seol ,  Ji-Ho Kim ,  Jae-Won Choe ,  Gyu-Bok Park ,  Jae-Moon Lee

IPC: H04M1/00 ,  H04B1/3888 ,  H01Q1/24 ,  H01Q1/44 ,  H01Q1/48 ,  H01Q7/00 ,  H01Q9/42 ,  H01Q21/28 ,  G06F1/16 ,  H01Q9/04 ,  H05K5/02

CPC classification number: H04B1/3888 ,  G06F1/1656 ,  H01Q1/243 ,  H01Q1/44 ,  H01Q1/48 ,  H01Q7/00 ,  H01Q9/0407 ,  H01Q9/0421 ,  H01Q9/42 ,  H01Q21/28 ,  H05K5/0247

Abstract: An electronic device with an antenna device is provided. The electronic device includes a case member that includes a first face, a second face disposed opposite to the first face, and side walls that enclose a space between the first face and the second face, a first metallic member that forms at least a portion of the side walls of the case member or is formed adjacent to the side walls, a metal pattern disposed within the case member and extends from a portion of the first metallic member to another portion of the first metallic member, the first metallic member and the metal pattern electrically forming at least a portion of a closed loop, a wireless communication circuit electrically connected to a portion of the metal pattern, a ground member positioned within the case member, and a portion of the metal pattern disposed adjacent to the ground member.

公开(公告)号：US09373698B2

公开(公告)日：2016-06-21

申请号：US14505662

申请日：2014-10-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tae-Sun Kim ,  Jae-Kyung Seo ,  Ji-Ho Kim ,  Kwang-Sub Yoon ,  Bum-Joon Youn ,  Ki-Man Lee

IPC: H01L23/52 ,  H01L29/66 ,  H01L29/78 ,  H01L29/165 ,  H01L21/8234 ,  H01L21/027 ,  H01L29/51

CPC classification number: H01L29/66636 ,  H01L21/0276 ,  H01L21/823418 ,  H01L21/823437 ,  H01L29/165 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/7834

Abstract: In a method of manufacturing a semiconductor device, an isolation layer pattern is formed on a substrate to define a field region covered by the isolation layer pattern and first and second active regions that is not covered by the isolation layer pattern and protrudes from the isolation layer pattern. A first anti-reflective layer is formed on the isolation layer pattern. A first photoresist layer is formed on the first and second active regions of the substrate and the first anti-reflective layer. The first photoresist layer is partially etched to form a first photoresist pattern covering the first active region. Impurities are implanted into the second active region to form a first impurity region.

Abstract translation: 在制造半导体器件的方法中，在衬底上形成隔离层图案，以限定由隔离层图案覆盖的场区域和未被隔离层图案覆盖并从隔离层突出的第一和第二有源区域 模式。 第一抗反射层形成在隔离层图案上。 在基板的第一和第二有源区域和第一抗反射层上形成第一光致抗蚀剂层。 部分蚀刻第一光致抗蚀剂层以形成覆盖第一有源区的第一光致抗蚀剂图案。 将杂质注入到第二有源区中以形成第一杂质区。