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公开(公告)号:US10522497B2
公开(公告)日:2019-12-31
申请号:US15988647
申请日:2018-05-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jeong Ho Lee , Bong Ju Cho , Young Gwan Ko , Jin Su Kim , Shang Hoon Seo , Jeong Il Lee
IPC: H01L23/48 , H01L23/00 , H01L21/48 , H01L21/56 , H01L23/498 , H01L23/31 , H01L21/683
Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion having a stopper layer; a semiconductor chip having connection pads, an active surface on which the connection pads are disposed, and an inactive surface opposing the active surface, and disposed in the recess portion so that the inactive surface is connected to the stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; and a connection member disposed on the frame and the active surface of the semiconductor chip and including a redistribution layer electrically connecting the wiring layers of the frame and the connection pads of the semiconductor chip to each other, wherein the stopper layer includes an insulating material.
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公开(公告)号:US10475748B2
公开(公告)日:2019-11-12
申请号:US15981651
申请日:2018-05-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jeong Ho Lee , Myung Sam Kang , Young Gwan Ko , Shang Hoon Seo , Jin Su Kim
IPC: H01L23/538 , H01L23/498 , H01L23/31 , H01L25/065 , H01L23/00
Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion having a stopper layer; a semiconductor chip having connection pads and disposed in the recess portion so that an inactive surface is connected to the stopper layer; a first encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; an electronic component disposed on the other surface of the frame opposing one surface of the frame in which the semiconductor chip is disposed; a second encapsulant covering at least portions of the electronic component; and a connection member disposed on the frame and an active surface of the semiconductor chip and including a redistribution layer, wherein the connection pads and the electronic component are electrically connected to each other through the wiring layers and the redistribution layer.
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公开(公告)号:US10418317B2
公开(公告)日:2019-09-17
申请号:US16037670
申请日:2018-07-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sang Kyu Lee , Jeong Ho Lee
IPC: H01L23/498 , H01L23/31 , H01L25/16 , H01L23/00 , H01L25/065
Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a first recess portion and a first stopper layer disposed on a bottom surface of the first recess portion; a semiconductor chip disposed in the first recess portion and having connection pads, an active surface on which the connection pads are disposed, and an inactive surface opposing the active surface and disposed on the first stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the first recess portion; and a connection member disposed on the frame and the active surface of the semiconductor chip and including a redistribution layer electrically connecting the wiring layers of the frame and the connection pads of the semiconductor chip to each other.
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公开(公告)号:US10410961B2
公开(公告)日:2019-09-10
申请号:US15978727
申请日:2018-05-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jeong Ho Lee , Myung Sam Kang , Young Gwan Ko , Jin Su Kim , Shang Hoon Seo , Jeong Il Lee
IPC: H01L23/498 , H01L23/31 , H01L23/00
Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion and a stopper layer disposed on a bottom surface of the recess portion; a semiconductor chip disposed in the recess portion, and having connection pads, an active surface on which the connection pads are disposed, and an inactive surface opposing the active surface and disposed on the stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; and a connection member disposed on the frame and the active surface of the semiconductor chip and including a redistribution layer electrically connecting the plurality of wiring layers of the frame and the connection pads of the semiconductor chip to each other. The active surface of the semiconductor chip and an upper surface of the encapsulant have a step portion therebetween.
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公开(公告)号:US10985127B2
公开(公告)日:2021-04-20
申请号:US16698516
申请日:2019-11-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jeong Ho Lee , Bong Ju Cho , Young Gwan Ko , Jin Su Kim , Shang Hoon Seo , Jeong Il Lee
IPC: H01L23/48 , H01L23/00 , H01L21/48 , H01L21/56 , H01L23/498 , H01L23/31 , H01L21/683
Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion having a stopper layer; a semiconductor chip having connection pads, an active surface on which the connection pads are disposed, and an inactive surface opposing the active surface, and disposed in the recess portion so that the inactive surface is connected to the stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; and a connection member disposed on the frame and the active surface of the semiconductor chip and including a redistribution layer electrically connecting the wiring layers of the frame and the connection pads of the semiconductor chip to each other, wherein the stopper layer includes an insulating material.
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公开(公告)号:US20170205645A1
公开(公告)日:2017-07-20
申请号:US15404696
申请日:2017-01-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ki Hyung KANG , Jeong Ho Lee , Bortnichenko Maria , Kwak Sik Min , Wook-Jae Jeon
IPC: G02F1/1334 , G02F1/1335 , G02F1/1333 , G02F1/1343
CPC classification number: G02F1/1334 , G02F1/133345 , G02F1/133514 , G02F1/133528 , G02F1/134309 , G02F1/134363 , G02F2001/133531 , G02F2001/134372 , G02F2201/121 , G02F2201/122 , G02F2201/123 , G02F2201/50
Abstract: A display apparatus having a backlight unit and a display panel is disclosed. The display panel includes: a first electrode unit having a common electrode; a second electrode unit having a different polarity from the first electrode unit, and configured to include a plurality of pixel electrodes each forming an electric field using electric force of the first electrode unit; an insulator disposed between the first electrode unit and the second electrode unit so as to achieve electric insulation between the first electrode unit and the second electrode unit; and a liquid crystal unit located adjacent to the insulator in a manner that several pixel electrodes of the second electrode unit are inserted in the liquid crystal unit. The length or height of the pixel electrodes of the second electrode unit is ⅓ or higher of the length or height of the liquid crystal unit.
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公开(公告)号:US10453788B2
公开(公告)日:2019-10-22
申请号:US15988893
申请日:2018-05-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jeong II Lee , Jeong Ho Lee , Jin Su Kim , Bong Ju Cho
IPC: H01L23/48 , H01L23/498 , H01L23/00 , H01L23/495 , H01L23/31
Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers disposed on the insulating layers, and connection via layers penetrating through the insulating layers and electrically connecting the wiring layers to each other, and having a recess portion; a semiconductor chip having connection pads and disposed in the recess portion so that an inactive surface is connected to the stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; and a connection member disposed on the frame and an active surface of the semiconductor chip and including one or more redistribution layers electrically connecting the wiring layers and the connection pads to each other, in which the recess portion includes walls having different inclined angles.
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公开(公告)号:US10509744B2
公开(公告)日:2019-12-17
申请号:US15844165
申请日:2017-12-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jeong Ho Lee , Sung Roh Yoon , Eui Young Chung , Jin Woo Kim , Young Jin Cho , Myeong Jin Kim , Sei Joon Kim , Jeong Bin Kim , Hyeok Jun Choe
Abstract: A semiconductor system includes a CPU connected to a heterogeneous memory module via a system bus. The heterogeneous memory module includes; a volatile memory module, a nonvolatile memory module, an internal bus separate from the system bus and connecting the volatile memory module and the nonvolatile memory module, and a swap manager configured to control execution of a swap operation transferring target data between the volatile memory module and nonvolatile memory module using the internal bus and without using of the system bus.
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