公开(公告)号：US20240250008A1

公开(公告)日：2024-07-25

申请号：US18453422

申请日：2023-08-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUSUK KANG ,  JU-IL CHOI ,  SUNG KEUN PARK ,  JONGHO PARK ,  HYUNJU LEE ,  JAEMOK JUNG

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L25/10

CPC classification number: H01L23/49822 ,  H01L23/3107 ,  H01L23/49838 ,  H01L23/49866 ,  H01L24/16 ,  H01L25/105 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/35121

Abstract: A semiconductor package, comprising a redistribution substrate including an insulating layer and a first redistribution pattern; and a semiconductor chip electrically connected to the redistribution substrate, wherein the first redistribution pattern comprises a first barrier layer; a second barrier layer on the first barrier layer; and a via structure on the second barrier layer, wherein the first barrier layer comprises a first conductive material and the second barrier layer comprises a second conductive material different from the first conductive material.

公开(公告)号：US20240429176A1

公开(公告)日：2024-12-26

申请号：US18417494

申请日：2024-01-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： JU-IL CHOI ,  KWANGOK JEONG ,  JAEMOK JUNG ,  JEONGGI JIN ,  TAE OH HA ,  HONGSEO HEO

IPC: H01L23/544 ,  H01L21/48 ,  H01L23/00 ,  H01L23/498 ,  H01L23/538

Abstract: A semiconductor package including: a first redistribution structure; a semiconductor chip on the first redistribution structure; a pad insulation layer on a lower surface of the first redistribution structure; a conductive pad extending into a lower surface of the pad insulation layer and electrically connected to the first redistribution structure; and a plurality of alignment patterns on an edge of the pad insulation layer, each of the plurality of alignment patterns including a first portion extending into a lower surface of the pad insulation layer and a second portion extending away from the lower surface of the pad insulation layer.

公开(公告)号：US20250006606A1

公开(公告)日：2025-01-02

申请号：US18416008

申请日：2024-01-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： HYUNJU LEE ,  GYUHO KANG ,  SUNG KEUN PARK ,  KWANGOK JEONG ,  JAEMOK JUNG ,  JU-IL CHOI

IPC: H01L23/498 ,  H01L23/00

Abstract: A semiconductor package may include: a substrate; a seed layer on a first surface of the substrate; a pad on the seed layer and including a first metal layer and a second metal layer on the first metal layer; an insulating layer on the first surface and including a side surface in contact with the second metal layer; and a semiconductor chip above a second surface of the substrate. An interface between the side surface of the insulating layer and the second metal layer may be nonplanar.