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    SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME
    2.
    发明申请
    SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME 审中-公开
    半导体器件及其形成方法

    公开(公告)号：US20140124854A1

    公开(公告)日：2014-05-08

    申请号：US14154740

    申请日：2014-01-14

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Heedon Hwang ,  Ji-Young Min ,  Jongchul Park ,  Insang Jeon ,  Woogwan Shim

    IPC: H01L29/78 ,  H01L29/66

    CPC classification number: H01L29/7827 ,  H01L27/10876 ,  H01L27/228 ,  H01L27/2436 ,  H01L29/66666 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/146

    Abstract: Semiconductor devices and methods of forming the same may be provided. The semiconductor devices may include a trench in a substrate. The semiconductor devices may also include a bulk electrode within opposing sidewalls of the trench. The semiconductor devices may further include a liner electrode between the bulk electrode and the opposing sidewalls of the trench. The liner electrode may include a sidewall portion between a sidewall of the bulk electrode and one of the opposing sidewalls of the trench.

    Abstract translation: 可以提供半导体器件及其形成方法。 半导体器件可以在衬底中包括沟槽。 半导体器件还可以包括在沟槽的相对侧壁内的体电极。 半导体器件还可以包括在本体电极和沟槽的相对侧壁之间的衬垫电极。 衬里电极可以包括在本体电极的侧壁和沟槽的相对侧壁中的一个之间的侧壁部分。

    Semiconductor devices having a silicon-germanium channel layer and methods of forming the same
    3.
    发明授权
    Semiconductor devices having a silicon-germanium channel layer and methods of forming the same 有权
    具有硅 - 锗沟道层的半导体器件及其形成方法

    公开(公告)号：US09305928B2

    公开(公告)日：2016-04-05

    申请号：US14175076

    申请日：2014-02-07

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Youngkuk Kim ,  Ho-Kyun An ,  Jaehyun Yeo ,  Badro Im ,  HanJin Lim ,  Sungho Jang ,  Insang Jeon

    IPC: H01L21/8242 ,  H01L27/108 ,  H01L21/8234

    CPC classification number: H01L27/10894 ,  H01L21/823412 ,  H01L21/823462 ,  H01L27/10814 ,  H01L27/10861

    Abstract: Semiconductor devices having a silicon-germanium channel layer and methods of forming the semiconductor devices are provided. The methods may include forming a silicon-germanium channel layer on a substrate in a peripheral circuit region and sequentially forming a first insulating layer and a second insulating layer on the silicon-germanium channel layer. The methods may also include forming a conductive layer on the substrate, which includes a cell array region and the peripheral circuit region, and patterning the conductive layer to form a conductive line in the cell array region and a gate electrode in the peripheral circuit region. The first insulating layer may be formed at a first temperature and the second insulating layer may be formed at a second temperature higher than the first temperature.

    Abstract translation: 提供具有硅 - 锗沟道层的半导体器件和形成半导体器件的方法。 所述方法可以包括在外围电路区域中的衬底上形成硅 - 锗沟道层，并且在硅 - 锗沟道层上依次形成第一绝缘层和第二绝缘层。 该方法还可以包括在衬底上形成导电层，该导电层包括电池阵列区域和外围电路区域，以及图案化导电层以在电池阵列区域中形成导线以及在外围电路区域中形成栅极电极。 第一绝缘层可以在第一温度下形成，并且第二绝缘层可以在高于第一温度的第二温度下形成。

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