公开(公告)号：US20160049176A1

公开(公告)日：2016-02-18

申请号：US14729042

申请日：2015-06-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong-won LEE ,  Jang-mee SEO ,  In-won O

IPC: G11C5/02 ,  G11C5/06

CPC classification number: G11C5/025 ,  G11C5/063 ,  H01L23/5386 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2924/15192 ,  H01L2924/014

Abstract: A semiconductor package includes: a plurality of memory packages which are arranged on a substrate; and a logic chip, which has a rhombus shape including first through fourth corners and first through fourth sides connecting the first through fourth corners, is arranged adjacent to the plurality of memory packages, and includes a plurality of terminals that are electrically connected to the plurality of memory packages, as seen on a plan view of the semiconductor package, wherein the plurality of terminals include system address terminals which are adjacent to the first corner of the logic chip and first and second system data terminals which are respectively arranged on the first and second sides contacting the first corner. Another semiconductor package and a method of fabrication are disclosed.

Abstract translation: 半导体封装包括：布置在基板上的多个存储器封装; 并且具有包括第一至第四角以及连接第一至第四角的第一至第四侧的菱形的逻辑芯片被布置成与多个存储器封装相邻，并且包括多个端子，电连接到多个 的存储器封装，如半导体封装的平面图所示，其中多个端子包括与逻辑芯片的第一角相邻的系统地址端子以及分别布置在第一和第二逻辑芯片上的第一和第二系统数据端子， 第二面接触第一个角落。 公开了另一种半导体封装和制造方法。

公开(公告)号：US09542978B2

公开(公告)日：2017-01-10

申请号：US14729042

申请日：2015-06-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong-won Lee ,  Jang-mee Seo ,  In-won O

IPC: G11C5/02 ,  G11C5/06

CPC classification number: G11C5/025 ,  G11C5/063 ,  H01L23/5386 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2924/15192 ,  H01L2924/014

Abstract: A semiconductor package includes: a plurality of memory packages which are arranged on a substrate; and a logic chip, which has a rhombus shape including first through fourth corners and first through fourth sides connecting the first through fourth corners, is arranged adjacent to the plurality of memory packages, and includes a plurality of terminals that are electrically connected to the plurality of memory packages, as seen on a plan view of the semiconductor package, wherein the plurality of terminals include system address terminals which are adjacent to the first corner of the logic chip and first and second system data terminals which are respectively arranged on the first and second sides contacting the first corner. Another semiconductor package and a method of fabrication are disclosed.

Abstract translation: 半导体封装包括：布置在基板上的多个存储器封装; 并且具有包括第一至第四角以及连接第一至第四角的第一至第四侧的菱形的逻辑芯片被布置成与多个存储器封装相邻，并且包括多个端子，电连接到多个 的存储器封装，如半导体封装的平面图所示，其中多个端子包括与逻辑芯片的第一角相邻的系统地址端子以及分别布置在第一和第二逻辑芯片上的第一和第二系统数据端子， 第二面接触第一个角落。 公开了另一种半导体封装和制造方法。