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公开(公告)号：US20200012444A1
公开(公告)日：2020-01-09
申请号：US16266187
申请日：2019-02-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Min Seok Ko , Joo Young Hwang , In Hwan Doh , Chul Lee , Jae Yoon Choi
IPC: G06F3/06
Abstract: A solid state drive including: a plurality of non-volatile memories, each of the non-volatile memories including a channel, the channel including at least one way connected to a die; a host interface which receives stream data and stream information from a host; and a resource allocator which allocates the stream data to super blocks of the plurality of non-volatile memories on the basis of the stream information, wherein a first super block includes a first unit super block, and the first unit super block includes a block of a first die corresponding to a first channel and connected to a plurality of ways included in the first channel.
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公开(公告)号：US09201789B1
公开(公告)日：2015-12-01
申请号：US14720139
申请日：2015-05-22
Applicant: Samsung Electronics Co., Ltd.
Inventor： Nam Wook Kang , In Hwan Doh , Chul Lee
CPC classification number: G06F12/0246 , G06F12/0638 , G06F2212/205 , G06F2212/7211
Abstract: A storage device includes a nonvolatile memory and a memory controller. The memory controller is configured to receive a first program request from an external host device and program first memory cells of a memory block according to the first program request. The memory controller is further configured to program second memory cells of the memory block without a request of the external host device if a second program request is not received from the external host device for a critical time.
Abstract translation: 存储装置包括非易失性存储器和存储器控制器。 存储器控制器被配置为从外部主机设备接收第一程序请求，并根据第一程序请求对存储块的第一存储器单元进行编程。 如果在关键时间没有从外部主机设备接收到第二程序请求，则存储器控制器还被配置为对存储块的第二存储器单元进行编程，而不需要外部主机设备的请求。
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公开(公告)号：US20210405724A1
公开(公告)日：2021-12-30
申请号：US17473522
申请日：2021-09-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： DAE OK KIM , In Hae Kang , Min Seok Ko , Yang Woo Roh , In Hwan Doh , Jong Won Lee , Se Jeong Jang
Abstract: An open channel solid state drive includes a flash memory including a first block and a controller which controls the flash memory, the controller receiving write data and a physical address of the first block from a host and attempting a write of the data in the first block. The controller generates first data which is not written in the first block among the write data when a power-off occurs during writing attempt. The write data includes the first data and second data already written in the first block. The controller determines whether successive writing of the first data in the first block is possible or impossible. If the successive writing is possible, the controller successively writes the data in the first block. If the successive writing is impossible, the host or the controller writes the first data and the second data in a second block of the flash memory.
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公开(公告)号：US09864526B2
公开(公告)日：2018-01-09
申请号：US15069155
申请日：2016-03-14
Applicant: Samsung Electronics Co., Ltd.
Inventor： Bum Hoe Koo , Nam Wook Kang , In Hwan Doh
IPC: G06F3/06
CPC classification number: G06F3/0616 , G06F3/0631 , G06F3/064 , G06F3/0659 , G06F3/0679
Abstract: A method of operating a memory controller which controls a non-volatile memory including a plurality of blocks is provided. The method includes determining an operation count for a first block among the plurality of blocks and avoiding successive wear-leveling on the first block based on the determined operation count thereof.
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公开(公告)号：US11010071B2
公开(公告)日：2021-05-18
申请号：US16266187
申请日：2019-02-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Min Seok Ko , Joo Young Hwang , In Hwan Doh , Chul Lee , Jae Yoon Choi
IPC: G06F3/06
Abstract: A solid state drive includes: a plurality of non-volatile memories, each of the non-volatile memories connected to a channel, the channel connected to at least one way connected to a die; a host interface which receives stream data and stream information from a host; and a resource allocator which allocates the stream data to super blocks of the plurality of non-volatile memories on the basis of the stream information. A super block includes a unit super block, and the unit super block includes a block of a first die corresponding to a first channel and connected to a plurality of the ways connected to the first channel. The stream data may include stream groups, and the stream information may include the number of streams included in a stream group. A performance factor of a stream or stream group an extent size of a stream, and an allocation position of the stream, may also be included in the stream information.
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Patent Agency Ranking
公开(公告)号：US20190065363A1
公开(公告)日：2019-02-28
申请号：US16173390
申请日：2018-10-29
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sangkwon MOON , Seung-Yeon Lee , Heewon Lee , In Hwan Doh , NamWook KANG
CPC classification number: G06F12/0246 , G06F3/0614 , G06F3/0652 , G06F3/0679 , G06F12/0253 , G06F2212/1016 , G06F2212/1032 , G06F2212/7205 , G06F2212/7209
Abstract: A method of operating a data storage device includes programming non-fully programmed memory blocks at a point in time when a reference time elapses from a point in time when each of the memory blocks is physically erased, acquiring a first interval and a second interval, calculating a disturb index based on the first interval and the second interval, selecting a victim block for garbage collection based on the disturb index, and copying valid page data of the victim block into a free block. The first interval is defined by a point in time when each of the memory blocks is physically erased and a point in time when each of the memory blocks is fully programmed. The second interval is an interval during which a fully programmed state is maintained after a point in time when each of the memory blocks is fully programmed.
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公开(公告)号：US11126238B2
公开(公告)日：2021-09-21
申请号：US16588179
申请日：2019-09-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dae Ok Kim , In Hae Kang , Min Seok Ko , Yang Woo Roh , In Hwan Doh , Jong Won Lee , Se Jeong Jang
Abstract: An open channel solid state drive includes a flash memory including a first block and a controller which controls the flash memory, the controller receiving write data and a physical address of the first block from a host and attempting a write of the data in the first block. The controller generates first data which is not written in the first block among the write data when a power-off occurs during writing attempt. The write data includes the first data and second data already written in the first block. The controller determines whether successive writing of the first data in the first block is possible or impossible. If the successive writing is possible, the controller successively writes the data in the first block. If the successive writing is impossible, the host or the controller writes the first data and the second data in a second block of the flash memory.
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公开(公告)号：US10572402B2
公开(公告)日：2020-02-25
申请号：US15964737
申请日：2018-04-27
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kumar Satish , Jupyung Lee , In Hwan Doh , JooYoung Hwang
Abstract: A storage device includes a memory device; and a controller configured to fetch a command from a host, the command indicating a logical address, process the command based on the logical address, and receive, from a first replica storage device, an acknowledgment signal indicating that the command has been processed by the first replica storage device.
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公开(公告)号：US11803223B2
公开(公告)日：2023-10-31
申请号：US17473522
申请日：2021-09-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dae Ok Kim , In Hae Kang , Min Seok Ko , Yang Woo Roh , In Hwan Doh , Jong Won Lee , Se Jeong Jang
CPC classification number: G06F1/305 , G06F3/064 , G06F3/0617 , G06F3/0688 , G06F12/0246
Abstract: An open channel solid state drive includes a flash memory including a first block and a controller which controls the flash memory, the controller receiving write data and a physical address of the first block from a host and attempting a write of the data in the first block. The controller generates first data which is not written in the first block among the write data when a power-off occurs during writing attempt. The write data includes the first data and second data already written in the first block. The controller determines whether successive writing of the first data in the first block is possible or impossible. If the successive writing is possible, the controller successively writes the data in the first block. If the successive writing is impossible, the host or the controller writes the first data and the second data in a second block of the flash memory.
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10.发明授权公开(公告)号：US10824564B2
公开(公告)日：2020-11-03
申请号：US16007667
申请日：2018-06-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Yu-hun Jun , Sil Wan Chang , Heechul Chae , Seontaek Kim , In Hwan Doh
IPC: G06F12/08 , G06F12/0811 , G06F3/06
Abstract: An operation method of a memory controller which is configured to control a nonvolatile memory device includes receiving a command from the outside, calculating a delay time based on a currently available write buffer, a previously available write buffer, and a reference value, and processing the command based on the delay time.
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