IMAGE SENSOR AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20250120194A1

    公开(公告)日:2025-04-10

    申请号:US18901417

    申请日:2024-09-30

    Abstract: An image sensor includes a substrate including a first region and a second region. A photodiode is in the first region of the substrate. A color filter array layer is on the first region of the substrate. The color filter array layer includes color filters. A pad structure extends through an upper portion of the second region of the substrate and protrudes upwardly over an upper surface of the substrate in a vertical direction substantially perpendicular to the upper surface of the substrate. A dummy structure is spaced apart from the pad structure on the second region of the substrate.

    SEMICONDUCTOR MEMORY DEVICE
    2.
    发明申请

    公开(公告)号:US20220254783A1

    公开(公告)日:2022-08-11

    申请号:US17731611

    申请日:2022-04-28

    Abstract: A semiconductor memory device may include a bit line extending in a first direction, a first conductive pattern extending in a second direction intersecting the first direction, a semiconductor pattern connecting the bit line and the first conductive pattern, a second conductive pattern including an insertion portion in the first conductive pattern, and a dielectric layer between the first conductive pattern and the second conductive pattern. The insertion portion of the second conductive pattern may have a width which increases as a distance from the semiconductor pattern increases.

    THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE

    公开(公告)号:US20230005948A1

    公开(公告)日:2023-01-05

    申请号:US17940441

    申请日:2022-09-08

    Abstract: A semiconductor memory device is disclosed. The device includes a peripheral circuit structure on a substrate, a semiconductor layer on the peripheral circuit structure, an electrode structure on the semiconductor layer, the electrode structure including electrodes stacked on the semiconductor layer, a vertical channel structure penetrating the electrode structure and being connected to the semiconductor layer, a separation structure penetrating the electrode structure, extending in a first direction, and horizontally dividing the electrode of the electrode structure into a pair of electrodes, an interlayered insulating layer covering the electrode structure, and a through contact penetrating the interlayered insulating layer and being electrically connected to the peripheral circuit structure.

    SEMICONDUCTOR MEMORY DEVICE
    4.
    发明申请

    公开(公告)号:US20210125991A1

    公开(公告)日:2021-04-29

    申请号:US16923572

    申请日:2020-07-08

    Abstract: A semiconductor memory device may include a bit line extending in a first direction, a first conductive pattern extending in a second direction intersecting the first direction, a semiconductor pattern connecting the bit line and the first conductive pattern, a second conductive pattern including an insertion portion in the first conductive pattern, and a dielectric layer between the first conductive pattern and the second conductive pattern. The insertion portion of the second conductive pattern may have a width which increases as a distance from the semiconductor pattern increases.

    THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE

    公开(公告)号:US20210082941A1

    公开(公告)日:2021-03-18

    申请号:US16857507

    申请日:2020-04-24

    Abstract: A semiconductor memory device is disclosed. The device includes a peripheral circuit structure on a substrate, a semiconductor layer on the peripheral circuit structure, an electrode structure on the semiconductor layer, the electrode structure including electrodes stacked on the semiconductor layer, a vertical channel structure penetrating the electrode structure and being connected to the semiconductor layer, a separation structure penetrating the electrode structure, extending in a first direction, and horizontally dividing the electrode of the electrode structure into a pair of electrodes, an interlayered insulating layer covering the electrode structure, and a through contact penetrating the interlayered insulating layer and being electrically connected to the peripheral circuit structure.

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