公开(公告)号：US20250151385A1

公开(公告)日：2025-05-08

申请号：US19018870

申请日：2025-01-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-chan SUH ,  Gi-gwan PARK ,  Dong-woo KIM ,  Dong-suk SHIN

IPC: H10D84/85 ,  H10D30/67 ,  H10D62/10 ,  H10D62/40 ,  H10D62/822 ,  H10D64/01 ,  H10D84/01 ,  H10D84/03

Abstract: A semiconductor device includes a substrate including a first region and a second region, fin type active areas extending in a first direction away from the substrate in each of the first and second regions, a plurality of nanosheets extending parallel to an upper surface of the fin type active areas and being spaced apart from the upper surface of the fin type active areas, a gate extending over the fin type active areas in a second direction crossing the first direction, a gate dielectric layer interposed between the gate and each of the nanosheets, first source and drain regions included in the first region and second source and drain regions included in the second region, and insulating spacers interposed between the fin type active areas and the nanosheets, wherein air spacers are interposed between the insulating spacers and the first source and drain regions.

公开(公告)号：US20170365604A1

公开(公告)日：2017-12-21

申请号：US15611893

申请日：2017-06-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-chan SUH ,  Gi-gwan PARK ,  Dong-woo KIM ,  Dong-suk SHIN

IPC: H01L27/092 ,  H01L29/06 ,  H01L21/8238 ,  H01L29/04 ,  H01L29/66 ,  H01L29/165

CPC classification number: H01L27/0924 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823878 ,  H01L27/092 ,  H01L29/045 ,  H01L29/0665 ,  H01L29/165 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/78696

Abstract: A semiconductor device includes a substrate including a first region and a second region, fin type active areas extending in a first direction away from the substrate in each of the first and second regions, a plurality of nanosheets extending parallel to an upper surface of the fin type active areas and being spaced apart from the upper surface of the fin type active areas, a gate extending over the fin type active areas in a second direction crossing the first direction, a gate dielectric layer interposed between the gate and each of the nanosheets, first source and drain regions included in the first region and second source and drain regions included in the second region, and insulating spacers interposed between the fin type active areas and the nanosheets, wherein air spacers are interposed between the insulating spacers and the first source and drain regions.

公开(公告)号：US20210305253A1

公开(公告)日：2021-09-30

申请号：US17345090

申请日：2021-06-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-chan SUH ,  Gi-gwan PARK ,  Dong-woo KIM ,  Dong-suk SHIN

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/165 ,  H01L29/66 ,  H01L29/04 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786

Abstract: A semiconductor device includes a substrate including a first region and a second region, fin type active areas extending in a first direction away from the substrate in each of the first and second regions, a plurality of nanosheets extending parallel to an upper surface of the fin type active areas and being spaced apart from the upper surface of the fin type active areas, a gate extending over the fin type active areas in a second direction crossing the first direction, a gate dielectric layer interposed between the gate and each of the nanosheets, first source and drain regions included in the first region and second source and drain regions included in the second region, and insulating spacers interposed between the fin type active areas and the nanosheets, wherein air spacers are interposed between the insulating spacers and the first source and drain regions.

公开(公告)号：US20230343787A1

公开(公告)日：2023-10-26

申请号：US18216041

申请日：2023-06-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-chan SUH ,  Gi-gwan PARK ,  Dong-woo KIM ,  Dong-suk SHIN

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/165 ,  H01L29/66 ,  H01L29/04 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786

CPC classification number: H01L27/0924 ,  H01L21/823814 ,  H01L29/165 ,  H01L21/823821 ,  H01L21/823878 ,  H01L29/6656 ,  H01L29/66545 ,  H01L29/045 ,  H01L29/0665 ,  H01L29/42392 ,  H01L29/78696 ,  H01L27/092 ,  H01L21/823807

Abstract: A semiconductor device includes a substrate including a first region and a second region, fin type active areas extending in a first direction away from the substrate in each of the first and second regions, a plurality of nanosheets extending parallel to an upper surface of the fin type active areas and being spaced apart from the upper surface of the fin type active areas, a gate extending over the fin type active areas in a second direction crossing the first direction, a gate dielectric layer interposed between the gate and each of the nanosheets, first source and drain regions included in the first region and second source and drain regions included in the second region, and insulating spacers interposed between the fin type active areas and the nanosheets, wherein air spacers are interposed between the insulating spacers and the first source and drain regions.

公开(公告)号：US20190319028A1

公开(公告)日：2019-10-17

申请号：US16453721

申请日：2019-06-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-chan SUH ,  Gi-gwan PARK ,  Dong-woo KIM ,  Dong-suk SHIN

IPC: H01L27/092 ,  H01L29/786 ,  H01L29/423 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/66 ,  H01L29/165 ,  H01L29/04

Abstract: A semiconductor device includes a substrate including a first region and a second region, fin type active areas extending in a first direction away from the substrate in each of the first and second regions, a plurality of nanosheets extending parallel to an upper surface of the fin type active areas and being spaced apart from the upper surface of the fin type active areas, a gate extending over the fin type active areas in a second direction crossing the first direction, a gate dielectric layer interposed between the gate and each of the nanosheets, first source and drain regions included in the first region and second source and drain regions included in the second region, and insulating spacers interposed between the fin type active areas and the nanosheets, wherein air spacers are interposed between the insulating spacers and the first source and drain regions.