公开(公告)号：US20250085858A1

公开(公告)日：2025-03-13

申请号：US18591238

申请日：2024-02-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donggeon Kim ,  Myeongsik Ryu ,  Bokyeon Won ,  Seokjae Lee ,  Daehyeon Kwon ,  Kyoungmin Kim ,  Inseok Baek ,  Selyung Yoon

IPC: G06F3/06

Abstract: A bit-line sense amplifier includes an amplifying circuit, an isolation circuit, an offset cancellation circuit and an equalizer. The amplifying circuit is connected to a bit-line and a complementary bit-line, senses a voltage difference between the bit-line and the complementary bit-line based on a first control signal and a second control signal, and adjusts a voltage of a sensing bit-line and a complementary sensing bit-line based on the voltage difference. The equalizer is connected to the sensing bit-line, and equalizes the bit-line and the complementary bit-line to a precharge voltage, based on an equalizing signal. The equalizer includes an equalizing transistor that has a source, a gate configured to receive the equalizing signal, and a drain. The source of the equalizing transistor is connected to a wiring structure through a direct contact, and the wiring structure is configured to receive the precharge voltage.