公开(公告)号：US20180219022A1

公开(公告)日：2018-08-02

申请号：US15935498

申请日：2018-03-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byoungkeun SON ,  Yoocheol SHIN ,  Changhyun LEE ,  Hyunjung KIM ,  Chung-II HYUN

IPC: H01L27/11582 ,  H01L21/28 ,  H01L27/1157 ,  H01L27/11565

CPC classification number: H01L27/11582 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L29/40117

Abstract: A semiconductor device includes a substrate, a stack, and channel structures penetrating the stack. The stack includes gate electrodes and insulating layers alternately and repeatedly stacked on the substrate, and extending in a first direction. The channel structures in a first row are spaced apart from each other in the first direction. The stack includes a first sidewall that includes first recessed portions and first protruding portions. Each of first recessed portions is defined by an adjacent pair of the first recessed portions. Each of the first recessed portions has a shape recessed toward a first region of the stack between an adjacent pair of the channel structures of the first row. Each of the first recessed portions has a width that decreases in a direction toward the first region when measured along the first direction.

公开(公告)号：US20200235003A1

公开(公告)日：2020-07-23

申请号：US16838648

申请日：2020-04-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chung-II HYUN ,  Semee JANG ,  Sung Yun LEE

IPC: H01L21/768 ,  H01L27/11575 ,  H01L27/11582 ,  H01L27/1157

Abstract: A semiconductor device includes a comprise a substrate including a main zone and an extension zone, vertical channels on the main zone, and an electrode structure including gate electrodes stacked on the substrate. The vertical channel structures extend in a first direction perpendicular to a top surface of the substrate. The gate electrodes include line regions and contact regions. The line regions extend from the main zone toward the extension zone along a second direction the second direction that is perpendicular to the first direction. The contact regions are on ends of the line regions and are thicker than the line regions. A spacing distance in the second direction between the contact regions is greater than a spacing distance in the first direction between the line regions.

公开(公告)号：US20130175663A1

公开(公告)日：2013-07-11

申请号：US13728785

申请日：2012-12-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byung-Kwan YOU ,  Seung-Woo PAEK ,  Chung-II HYUN ,  Jung-Dal CHOI

IPC: H01L27/10

CPC classification number: H01L27/10 ,  H01L27/115 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11565 ,  H01L27/1157 ,  H01L29/66636

Abstract: A semiconductor memory device includes linear patterns disposed between isolation trenches extending in a first direction in a semiconductor device and having a first crystal direction the same as the semiconductor substrate. A bridge pattern connects at least two adjacent linear patterns and includes a semiconductor material having a second crystal direction different from the first crystal direction. A first isolation layer pattern is disposed in at least one of the isolation trenches in a field region of the semiconductor substrate. Memory cells are disposed on at least one of the linear patterns.

Abstract translation: 半导体存储器件包括设置在半导体器件中沿第一方向延伸并具有与半导体衬底相同的第一晶体方向的隔离沟槽之间的线状图案。 桥模式连接至少两个相邻的线状图案，并且包括具有与第一晶体方向不同的第二晶体方向的半导体材料。 第一隔离层图案设置在半导体衬底的场区域中的至少一个隔离沟槽中。 存储单元被布置在至少一个线性图案上。