公开(公告)号：US20150199201A1

公开(公告)日：2015-07-16

申请号：US14524231

申请日：2014-10-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUN-YOUNG LIM ,  MIN-YEAB CHOO ,  MI-KYOUNG PARK ,  DONG-YANG LEE ,  BU-IL JUNG ,  JU-YUN JUNG ,  HYUK HAN

IPC: G06F9/44

CPC classification number: G06F11/0793 ,  G06F9/445 ,  G06F11/073 ,  G06F11/1004 ,  G06F11/1417

Abstract: In a method of operating a memory system including a memory device, a memory controller and a host according to example embodiments, a hardware is initialized based on a fail information and a boot code stored in a nonvolatile memory of a volatile memory and the nonvolatile memory included in the memory device. A host processes data in an internal memory included in the memory controller and a safe region included in the memory device based on the fail information. Using the fail information, the method of operating the memory system according to example embodiments increases the performance of the whole system including the memory system.

Abstract translation: 在根据示例实施例的操作包括存储器设备，存储器控制器和主机的存储器系统的方法中，基于存储在易失性存储器和非易失性存储器的非易失性存储器中的故障信息和引导代码来初始化硬件 包含在存储设备中。 主机根据故障信息处理包含在存储器控制器中的内部存储器中的数据和包括在存储器件中的安全区域。 使用失败信息，根据示例性实施例的操作存储器系统的方法增加了包括存储器系统的整个系统的性能。

公开(公告)号：US20140173234A1

公开(公告)日：2014-06-19

申请号：US14104574

申请日：2013-12-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： BU-IL JUNG ,  So-Young KIM

IPC: G06F3/06

CPC classification number: G06F3/0688 ,  G06F3/0616 ,  G06F3/064 ,  G06F12/0246 ,  G06F2212/7211

Abstract: A semiconductor memory system or device includes a memory cell array and an address converter. The memory cell array includes a plurality of memory blocks, and there is at least one block that serves as a buffer. Each of the memory blocks includes at least one memory cell row. An address converting circuit along with a block copy circuit performs a block copy operation of copying data of a first memory block, which is a source block among the memory blocks, into a second block, which is a buffer or destination block, and maps a first logical address for accessing the first memory block onto a physical address designating the second block. The first memory block then can serve as a new destination block after the block copy operation of the first memory block is completed.

Abstract translation: 半导体存储器系统或器件包括存储单元阵列和地址转换器。 存储单元阵列包括多个存储器块，并且存在用作缓冲器的至少一个块。 每个存储块包括至少一个存储单元行。 地址转换电路与块复制电路一起执行将作为存储块中的源块的第一存储块的数据复制到作为缓冲器或目的地块的第二块中的块复制操作，并将 用于将第一存储器块访问到指定第二块的物理地址的第一逻辑地址。 然后，第一存储器块的块复制操作完成之后，第一存储器块可以用作新的目标块。