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    GATE DRIVING CIRCUIT AND DISPLAY DEVICE INCLUDING THE SAME
    1.
    发明申请
    GATE DRIVING CIRCUIT AND DISPLAY DEVICE INCLUDING THE SAME 有权

    公开(公告)号：US20170256225A1

    公开(公告)日：2017-09-07

    申请号：US15446368

    申请日：2017-03-01

    Applicant: SAMSUNG DISPLAY CO., LTD.

    Inventor： Masami IGAWA ,  Noboru TAKEUCHI

    IPC: G09G3/36

    Abstract: A gate driving circuit includes a plurality of stages. A k-th stage from among the plurality of stages, the k-th stage includes a first input circuit to receive a (k−1)th gate signal from a (k−1)th stage and to precharge a first node, a second input circuit to receive a (k+2)th gate signal from a (k+2)th stage to transmit the received (k+2)th gate signal to a second node, an output circuit to output a first clock signal as a k-th gate signal in response to a signal of the first node, a discharge circuit configured to discharge the first node through the k-th gate signal in response to a signal of the second node, a first transfer circuit to transfer a second clock signal to the first node, and a second transfer circuit to transfer the first clock signal to the second node.

    GATE DRIVER AND DISPLAY APPARATUS HAVING THE SAME
    2.
    发明申请
    GATE DRIVER AND DISPLAY APPARATUS HAVING THE SAME 审中-公开

    公开(公告)号：US20180061353A1

    公开(公告)日：2018-03-01

    申请号：US15805754

    申请日：2017-11-07

    Applicant: Samsung Display Co., Ltd.

    Inventor： Noboru TAKEUCHI ,  Masami IGAWA ,  Min soo KANG ,  Beomjun KIM ,  YoonHo KIM ,  Seongyeol SYN ,  Hong-Woo LEE

    IPC: G09G3/36 ,  G11C19/28

    CPC classification number: G09G3/3677 ,  G09G2310/0267 ,  G09G2310/0286 ,  G11C19/28

    Abstract: Each stage of a gate driver includes a controlling part which increases an electric potential of a boosting line in response to a carry signal of a previous stage and decreases the electric potential of the boosting line in response to the carry signal of a next stage, a first output part which turns on in response to the increased electric potential of the boosting line and receiving a clock signal to output a gate signal of a present stage, and a second output part which turns on in response to the increased electric potential of the boosting line and receiving the clock signal to output the carry signal of the present stage. The boosting line of the present stage is disposed adjacent to a gate line which is connected to one of next stages following the present stage.

    GATE DRIVER FOR PROVIDING VARIABLE GATE-OFF VOLTAGE AND DISPLAY DEVICE INCLUDING THE SAME
    3.
    发明申请
    GATE DRIVER FOR PROVIDING VARIABLE GATE-OFF VOLTAGE AND DISPLAY DEVICE INCLUDING THE SAME 审中-公开
    用于提供可变栅极电压的门极驱动器和包括其的显示装置

    公开(公告)号：US20160189654A1

    公开(公告)日：2016-06-30

    申请号：US14715792

    申请日：2015-05-19

    Applicant: Samsung Display Co., LTD.

    Inventor： Yoon Ho KIM ,  Beom Jun KIM ,  Geun Hyuk CHOI ,  Noboru TAKEUCHI ,  Yong Soon LEE ,  Jong Hwan LEE ,  Hong-Woo LEE ,  Yong-Sik HWANG

    IPC: G09G3/36

    CPC classification number: G09G3/3685 ,  G09G3/3696 ,  G09G2310/08 ,  G09G2320/041 ,  G09G2320/043

    Abstract: A display panel includes: a display panel including a plurality of gate lines, a plurality of data lines, and a plurality of pixels; a gate driver connected to the plurality of gate lines to apply a gate signal voltage; a data driver connected to the plurality of data lines to apply a data voltage and a negative data voltage; and a gate voltage divider for generating a gate signal voltage including gate-on and gate-off voltages to provided it to the gate driver. The gate voltage divider adjusts the gate-off voltage in accordance with a driving time of the display panel and a temperature of the display panel.

    Abstract translation: 显示面板包括：显示面板，包括多条栅极线，多条数据线和多个像素; 连接到所述多个栅极线以施加栅极信号电压的栅极驱动器; 连接到所述多条数据线的数据驱动器，以施加数据电压和负数据电压; 以及栅极分压器，用于产生包括栅极导通和栅极截止电压的栅极信号电压，以将其提供给栅极驱动器。 栅极分压器根据显示面板的驱动时间和显示面板的温度调节栅极截止电压。

    GATE DRIVER AND DISPLAY APPARATUS HAVING THE SAME
    4.
    发明申请
    GATE DRIVER AND DISPLAY APPARATUS HAVING THE SAME 审中-公开
    闸门驱动器和显示装置

    公开(公告)号：US20160189598A1

    公开(公告)日：2016-06-30

    申请号：US14755769

    申请日：2015-06-30

    Applicant: Samsung Display Co., LTD.

    Inventor： Noboru TAKEUCHI ,  Masami IGAWA ,  Min soo KANG ,  Beomjun KIM ,  YoonHo KIM ,  Seongyeol SYN ,  Hong-Woo LEE

    IPC: G09G3/20 ,  G09G3/36

    CPC classification number: G09G3/3677 ,  G09G2310/0267 ,  G09G2310/0286 ,  G11C19/28

    Abstract: Each stage of a gate driver includes a controlling part which increases an electric potential of a boosting line in response to a carry signal of a previous stage and decreases the electric potential of the boosting line in response to the carry signal of a next stage, a first output part which turns on in response to the increased electric potential of the boosting line and receiving a clock signal to output a gate signal of a present stage, and a second output part which turns on in response to the increased electric potential of the boosting line and receiving the clock signal to output the carry signal of the present stage. The boosting line of the present stage is disposed adjacent to a gate line which is connected to one of next stages following the present stage.

    Abstract translation: 栅极驱动器的每个级包括控制部分，其响应于前一级的进位信号而增加升压线的电位，并且响应于下一级的进位信号而降低升压线的电位， 第一输出部，其响应于所述升压线的电位增加而接通，并接收时钟信号以输出当前级的门信号;以及第二输出部，其响应于所述升压的电位增加而导通 并接收时钟信号以输出当前级的进位信号。 本阶段的升压线设置为与连接到现阶段之后的下一级中的一个栅极线相邻。

    GATE DRIVING CIRCUIT AND DISPLAY DEVICE COMPRISING THE SAME
    6.
    发明申请
    GATE DRIVING CIRCUIT AND DISPLAY DEVICE COMPRISING THE SAME 有权
    门驱动电路和包括该门的显示装置

    公开(公告)号：US20160358573A1

    公开(公告)日：2016-12-08

    申请号：US15012612

    申请日：2016-02-01

    Applicant: Samsung Display Co. Ltd.

    Inventor： Noboru TAKEUCHI ,  Min Soo KANG ,  Beom Jun KIM ,  Yoon Ho KIM ,  Seong Yeol SYN ,  Hong Woo LEE

    IPC: G09G3/36 ,  H03K17/687

    CPC classification number: G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0289 ,  G09G2310/08 ,  G11C19/28

    Abstract: A gate driving circuit is provided. A gate driving circuit comprises a pull-up control unit including a control transistor, a pull-up unit, a carry unit which outputs a clock signal into a kth carry signal and a pull-down unit which pulls down a control node to an off voltage, wherein the control transistor includes one electrode and the other electrode connected to the control node, the one electrode and the other electrode being disposed on a gate electrode such that the one electrode and the other electrode being insulated from the gate electrode, wherein the gate electrode and the other electrode are disposed not to be overlapped with each other, and a distance between an upper surface of the gate electrode and a lower surface of the one electrode is longer than that of the upper surface of the gate electrode and a lower surface of the other electrode.

    Abstract translation: 提供了栅极驱动电路。 栅极驱动电路包括上拉控制单元，其包括控制晶体管，上拉单元，将时钟信号输出到第k个进位信号的进位单元和将控制节点拉低关断的下拉单元 电压，其中所述控制晶体管包括一个电极，而另一个电极连接到所述控制节点，所述一个电极和所述另一个电极设置在栅电极上，使得所述一个电极和所述另一个电极与所述栅电极绝缘，其中， 栅电极和另一电极彼此不重叠设置，并且栅电极的上表面和一个电极的下表面之间的距离比栅电极的上表面的距离长，下电极的下表面 另一个电极的表面。

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