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    Scan driver and display device having the same
    2.
    发明授权
    Scan driver and display device having the same 有权

    公开(公告)号：US11127339B2

    公开(公告)日：2021-09-21

    申请号：US16875682

    申请日：2020-05-15

    Applicant: Samsung Display Co., Ltd.

    Inventor： Kang Nam Kim ,  Sung Hoon Lim ,  Woo Geun Lee ,  Kyu Sik Cho ,  Jae Beom Choi

    IPC: G09G3/3266 ,  G09G3/20

    Abstract: A scan driver includes a plurality of stages. An nth (n is a natural number) stage among the stages includes: a first and a second input circuit for controlling a voltage of a first node in response to a carry signal of a previous stage and a next stage, respectively; a first output circuit for outputting an nth carry signal corresponding to a carry clock signal in response to the voltage of the first node; a second output circuit for outputting an nth scan and an nth sensing signal corresponding to a scan and a sensing clock signal, respectively, in response to the voltage of the first node; and a sampling circuit for storing the carry signal of the previous stage in response to a first select signal, and for supplying a control voltage to the first node in response to a second select signal and the stored carry signal.

    Scan driver and display device having the same
    4.
    发明授权
    Scan driver and display device having the same 有权

    公开(公告)号：US11626060B2

    公开(公告)日：2023-04-11

    申请号：US17478825

    申请日：2021-09-17

    Applicant: Samsung Display Co., Ltd.

    Inventor： Kang Nam Kim ,  Sung Hoon Lim ,  Woo Geun Lee ,  Kyu Sik Cho ,  Jae Beom Choi

    IPC: G09G3/3266 ,  G09G3/20

    Abstract: A scan driver includes a plurality of stages. An nth (n is a natural number) stage among the stages includes: a first and a second input circuit for controlling a voltage of a first node in response to a carry signal of a previous stage and a next stage, respectively; a first output circuit for outputting an nth carry signal corresponding to a carry clock signal in response to the voltage of the first node; a second output circuit for outputting an nth scan and an nth sensing signal corresponding to a scan and a sensing clock signal, respectively, in response to the voltage of the first node; and a sampling circuit for storing the carry signal of the previous stage in response to a first select signal, and for supplying a control voltage to the first node in response to a second select signal and the stored carry signal.

    Display device
    5.
    发明授权
    Display device 有权

    公开(公告)号：US09865212B2

    公开(公告)日：2018-01-09

    申请号：US14742915

    申请日：2015-06-18

    Applicant: Samsung Display Co., Ltd.

    Inventor： Duc-Han Cho ,  Kang Nam Kim ,  Beom Jun Kim ,  You Mee Hyun

    IPC: G09G3/36 ,  G11C19/28

    CPC classification number: G09G3/3677 ,  G09G3/3648 ,  G09G2310/0283 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2330/021 ,  G11C19/287

    Abstract: A display device includes: a plurality of pixels; a plurality of gate lines connected to the plurality of pixels; an output terminal connected to a gate line of the gate lines; a first transistor connected to a first node, a first clock signal input terminal and the output terminal; a second transistor connected to a second clock signal input terminal, a low-level power voltage and the output terminal; a third transistor connected to a second node, the low-level power voltage and the first node; a fourth transistor connected to a first forward input terminal, the low-level power voltage and the second node; and a fifth transistor connected to a first backward input terminal, the low-level power voltage and the second node.

    GATE DRIVER AND A DISPLAY DEVICE INCLUDING THE SAME
    6.
    发明申请
    GATE DRIVER AND A DISPLAY DEVICE INCLUDING THE SAME 有权
    闸门驱动器和包括其的显示装置

    公开(公告)号：US20140204009A1

    公开(公告)日：2014-07-24

    申请号：US13929937

    申请日：2013-06-28

    Applicant: SAMSUNG DISPLAY CO., LTD.

    Inventor： Kang Nam Kim ,  Duc-Han Cho ,  You Mee Hyun ,  Jeong-II Kim ,  Jong Woong Chang

    IPC: G09G3/36 ,  H03K17/14

    CPC classification number: H03K17/145 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2310/0286 ,  G09G2320/041

    Abstract: A gate driver includes a plurality of stages, wherein an n-th stage includes: a pull-up unit configured to output a high voltage of a clock signal as a high voltage of an n-th gate signal; a pull-down unit configured to decrease the high voltage of the n-th gate signal to a first low voltage; a discharging unit configured to discharge a voltage of the first node to a second low voltage lower than the first low voltage; a carry unit configured to output the high voltage of the clock signal as an n-th carry signal; an inverter unit configured to output a signal in synchronization with the clock signal; a first node storage unit configured to maintain the voltage of the first node at the second low voltage; and a second node storage unit configured to maintain the voltage of the second node at the first or second low voltage.

    Abstract translation: 栅极驱动器包括多个级，其中第n级包括：上拉单元，被配置为输出时钟信号的高电压作为第n门信号的高电压; 下拉单元，被配置为将第n栅极信号的高电压降低到第一低电压; 放电单元，被配置为将所述第一节点的电压放电到低于所述第一低电压的第二低电压; 输入单元，被配置为输出所述时钟信号的高电压作为第n进位信号; 逆变器单元，被配置为与时钟信号同步地输出信号; 第一节点存储单元，被配置为将所述第一节点的电压维持在所述第二低电压; 以及第二节点存储单元，被配置为将所述第二节点的电压维持在所述第一或第二低电压。

    Gate driver and display device including the same
    8.
    发明授权
    Gate driver and display device including the same 有权

    公开(公告)号：US11521570B2

    公开(公告)日：2022-12-06

    申请号：US16809452

    申请日：2020-03-04

    Applicant: Samsung Display Co., Ltd.

    Inventor： Sung Hoon Lim ,  Kang Nam Kim ,  Seok Hwan Bang ,  Sung Hwan Won ,  Woo Geun Lee ,  Kyu Sik Cho ,  Soo Jung Chae

    IPC: G09G3/36

    Abstract: A gate driver for a display device includes: a clock signal line to transfer a clock signal; and a plurality of stages to sequentially output a gate signal based upon the clock signal in response to a carry signal. The plurality of stages include a plurality of thin film transistors, and at least one of the plurality of thin film transistors includes a thin film transistor including an oxide semiconductor. The at least one thin film transistor includes a first gate electrode and a second gate electrode disposed in different layers, the oxide semiconductor is disposed between the first gate electrode and the second gate electrode, and the first gate electrode and the second gate electrode are connected to receive a common voltage signal.

    Gate driver and a display device including the same
    10.
    发明授权
    Gate driver and a display device including the same 有权
    门驱动器和包括其的显示装置

    公开(公告)号：US09203395B2

    公开(公告)日：2015-12-01

    申请号：US13929937

    申请日：2013-06-28

    Applicant: SAMSUNG DISPLAY CO., LTD.

    Inventor： Kang Nam Kim ,  Duc-Han Cho ,  You Mee Hyun ,  Jeong-Il Kim ,  Jong Woong Chang

    IPC: G09G3/36 ,  H03K17/14

    CPC classification number: H03K17/145 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2310/0286 ,  G09G2320/041

    Abstract: A gate driver includes a plurality of stages, wherein an n-th stage includes: a pull-up unit configured to output a high voltage of a clock signal as a high voltage of an n-th gate signal; a pull-down unit configured to decrease the high voltage of the n-th gate signal to a first low voltage; a discharging unit configured to discharge a voltage of the first node to a second low voltage lower than the first low voltage; a carry unit configured to output the high voltage of the clock signal as an n-th carry signal; an inverter unit configured to output a signal in synchronization with the clock signal; a first node storage unit configured to maintain the voltage of the first node at the second low voltage; and a second node storage unit configured to maintain the voltage of the second node at the first or second low voltage.

    Abstract translation: 栅极驱动器包括多个级，其中第n级包括：上拉单元，被配置为输出时钟信号的高电压作为第n门信号的高电压; 下拉单元，被配置为将第n栅极信号的高电压降低到第一低电压; 放电单元，被配置为将所述第一节点的电压放电到低于所述第一低电压的第二低电压; 输入单元，被配置为输出所述时钟信号的高电压作为第n进位信号; 逆变器单元，被配置为与时钟信号同步地输出信号; 第一节点存储单元，被配置为将所述第一节点的电压维持在所述第二低电压; 以及第二节点存储单元，被配置为将所述第二节点的电压维持在所述第一或第二低电压。

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